Datasheet
t
h(boot-mode)
(A)
XRS
Boot-Mode
Pins
I/O Pins
CPU
Execution
Phase
Boot-ROM execution starts
(initiated by any reset source)
User-Code Execution Starts
User Code
Boot ROM
User-Code Dependent
User Code
Peripheral/GPIO Function
User-Code Dependent
GPIO Pins as Input (Pullups are Disabled)
GPIO Pins as Input
Peripheral/GPIO Function
t
w(RSL2)
t
h(boot-mode)
(B)
XRS
(A)
Boot-Mode
Pins
V V
(3.3 V)
DDIO DDA
,
V (1.2 V)
DD
User-code dependent
Boot-ROM execution starts
Peripheral/GPIO function
Based on boot code
GPIO pins as input
CPU
Execution
Phase
Boot ROM
User-code
I/O Pins
GPIO pins as input (pullups are disabled)
User-code dependent
t
w(RSL1)
58
TMS320F28379S
,
TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881C –AUGUST 2014–REVISED MAY 2016
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Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
Specifications Copyright © 2014–2016, Texas Instruments Incorporated
A. The XRS pin can be driven externally by a supervisor or an external pullup resistor, see Table 4-1. On-chip POR logic
will hold this pin low until the supplies are in a valid range.
B. After reset from any source (see Section 5.7.2.1), the boot ROM code samples Boot Mode pins. Based on the status
of the Boot Mode pin, the boot code branches to destination memory or boot code function. If boot ROM code
executes after power-on conditions (in debugger environment), the boot code execution time is based on the current
SYSCLK speed. The SYSCLK will be based on user environment and could be with or without PLL enabled.
Figure 5-5. Power-on Reset
A. After reset from any source (see Section 5.7.2.1), the Boot ROM code samples BOOT Mode pins. Based on the
status of the Boot Mode pin, the boot code branches to destination memory or boot code function. If Boot ROM code
executes after power-on conditions (in debugger environment), the Boot code execution time is based on the current
SYSCLK speed. The SYSCLK will be based on user environment and could be with or without PLL enabled.
Figure 5-6. Warm Reset