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TMS320F28379S

TMS320F28377S

TMS320F28376S, TMS320F28375S, TMS320F28374S

SPRS881C –AUGUST 2014–REVISED MAY 2016

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Table 4-1. Signal Descriptions (continued)

TERMINAL

I/O/Z

(1)

DESCRIPTION

NAME

MUX

POSITION

ZWT

BALL

NO.

PTP

NO.

PZP

NO.

GPIO102 0, 4, 8, 12

H3 – –

I/O General-purpose input/output 102

EM2A4 3 O External memory interface 2 address line 4

EQEP2S 5 I/O Enhanced QEP2 strobe

SPICLKC 6 I/O SPI-C clock

GPIO103 0, 4, 8, 12

J1 – –

I/O General-purpose input/output 103

EM2A5 3 O External memory interface 2 address line 5

EQEP2I 5 I/O Enhanced QEP2 index

SPISTEC 6 I/O SPI-C slave transmit enable

GPIO104 0, 4, 8, 12

J2 – –

I/O General-purpose input/output 104

SDAA 1 I/OD I2C-A data open-drain bidirectional port

EM2A6 3 O External memory interface 2 address line 6

EQEP3A 5 I Enhanced QEP3 input A

SCITXDD 6 O SCI-D transmit data

GPIO105 0, 4, 8, 12

J3 – –

I/O General-purpose input/output 105

SCLA 1 I/OD I2C-A clock open-drain bidirectional port

EM2A7 3 O External memory interface 2 address line 7

EQEP3B 5 I Enhanced QEP3 input B

SCIRXDD 6 I SCI-D receive data

GPIO106 0, 4, 8, 12

L2 – –

I/O General-purpose input/output 106

EM2A8 3 O External memory interface 2 address line 8

EQEP3S 5 I/O Enhanced QEP3 strobe

SCITXDC 6 O SCI-C transmit data

GPIO107 0, 4, 8, 12

L3 – –

I/O General-purpose input/output 107

EM2A9 3 O External memory interface 2 address line 9

EQEP3I 5 I/O Enhanced QEP3 index

SCIRXDC 6 I SCI-C receive data

GPIO108 0, 4, 8, 12

L4 – –

I/O General-purpose input/output 108

EM2A10 3 O External memory interface 2 address line 10

GPIO109 0, 4, 8, 12

N2 – –

I/O General-purpose input/output 109

EM2A11 3 O External memory interface 2 address line 11

GPIO110 0, 4, 8, 12

M2 – –

I/O General-purpose input/output 110

EM2WAIT 3 I External memory interface 2 Asynchronous SRAM WAIT

GPIO111 0, 4, 8, 12

M4 – –

I/O General-purpose input/output 111

EM2BA0 3 O External memory interface 2 bank address 0

GPIO112 0, 4, 8, 12

M3 – –

I/O General-purpose input/output 112

EM2BA1 3 O External memory interface 2 bank address 1

GPIO113 0, 4, 8, 12

N4 – –

I/O General-purpose input/output 113

EM2CAS 3 O External memory interface 2 column address strobe

GPIO114 0, 4, 8, 12

N3 – –

I/O General-purpose input/output 114

EM2RAS 3 O External memory interface 2 row address strobe

GPIO115 0, 4, 8, 12

V12 – –

I/O General-purpose input/output 115

EM2CS0 3 O External memory interface 2 chip select 0

GPIO116 0, 4, 8, 12

W10 – –

I/O General-purpose input/output 116

EM2CS2 3 O External memory interface 2 chip select 2