Datasheet

25
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
Terminal Configuration and FunctionsCopyright © 2014–2016, Texas Instruments Incorporated
Table 4-1. Signal Descriptions (continued)
TERMINAL
I/O/Z
(1)
DESCRIPTION
NAME
MUX
POSITION
ZWT
BALL
NO.
PTP
PIN
NO.
PZP
PIN
NO.
GPIO54 0, 4, 8, 12
P18 98 –
I/O General-purpose input/output 54
SPISIMOA 1 I/O SPI-A slave in, master out
EM1D30 2 I/O External memory interface 1 data line 30
EM2D14 3 I/O External memory interface 2 data line 14
EQEP2A 5 I Enhanced QEP2 input A
SCITXDB 6 O SCI-B transmit data
SD1_D4 7 I Sigma-Delta 1 channel 4 data input
GPIO55 0, 4, 8, 12
P19 100 –
I/O General-purpose input/output 55
SPISOMIA 1 I/O SPI-A slave out, master in
EM1D29 2 I/O External memory interface 1 data line 29
EM2D13 3 I/O External memory interface 2 data line 13
EQEP2B 5 I Enhanced QEP2 input B
SCIRXDB 6 I SCI-B receive data
SD1_C4 7 I Sigma-Delta 1 channel 4 clock input
GPIO56 0, 4, 8, 12
N16 101 –
I/O General-purpose input/output 56
SPICLKA 1 I/O SPI-A clock
EM1D28 2 I/O External memory interface 1 data line 28
EM2D12 3 I/O External memory interface 2 data line 12
EQEP2S 5 I/O Enhanced QEP2 strobe
SCITXDC 6 O SCI-C transmit data
SD2_D1 7 I Sigma-Delta 2 channel 1 data input
GPIO57 0, 4, 8, 12
N18 102 –
I/O General-purpose input/output 57
SPISTEA 1 I/O SPI-A slave transmit enable
EM1D27 2 I/O External memory interface 1 data line 27
EM2D11 3 I/O External memory interface 2 data line 11
EQEP2I 5 I/O Enhanced QEP2 index
SCIRXDC 6 I SCI-C receive data
SD2_C1 7 I Sigma-Delta 2 channel 1 clock input
GPIO58 0, 4, 8, 12
N17 103 52
I/O General-purpose input/output 58
MCLKRA 1 I/O McBSP-A receive clock
EM1D26 2 I/O External memory interface 1 data line 26
EM2D10 3 I/O External memory interface 2 data line 10
OUTPUTXBAR1 5 O Output 1 of the output XBAR
SPICLKB 6 I/O SPI-B clock
SD2_D2 7 I Sigma-Delta 2 channel 2 data input
SPISIMOA 15 I/O SPI-A slave in, master out
(2)
GPIO59 0, 4, 8, 12
M16 104 53
I/O General-purpose input/output 59
(3)
MFSRA 1 I/O McBSP-A receive frame synch
EM1D25 2 I/O External memory interface 1 data line 25
EM2D9 3 I/O External memory interface 2 data line 9
OUTPUTXBAR2 5 O Output 2 of the output XBAR
SPISTEB 6 I/O SPI-B slave transmit enable
SD2_C2 7 I Sigma-Delta 2 channel 2 clock input
SPISOMIA 15 I/O SPI-A slave out, master in
(2)