Datasheet

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OSCCLK
Watchdog
Prescaler
WDCR(WDPS(2:0))
WDCLK
WDCR(WDDIS)
SCSR(WDENINT)
1 WDCLK
delay
Overflow
SYSRSn
Clear
8-bit
Watchdog
Counter
WDCNTR(7:0)
WDKEY(7:0)
Watchdog
Key Detector
55 + AA
WDWCR(MIN(7:0))
Watchdog
Window
Detector
Good Key
Bad Key
Out of Window
Generate
512-OSCCLK
Output Pulse
Watchdog Time-out
WDINTn
Count
In Window
WDRSn
197
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
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Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
Detailed DescriptionCopyright © 2014–2016, Texas Instruments Incorporated
6.13 Watchdog
The watchdog module is the same as the one on previous TMS320C2000 devices, but with an optional
lower limit on the time between software resets of the counter. This windowed countdown is disabled by
default, so the watchdog is fully backwards-compatible.
The watchdog generates either a reset or an interrupt. It is clocked from the internal oscillator with a
selectable frequency divider.
Figure 6-4 shows the various functional blocks within the watchdog module.
Figure 6-4. Windowed Watchdog
6.14 Configurable Logic Block (CLB)
TI uses the CLB to offer additional interfacing and control features for select C2000 devices. Functions
that would otherwise be accomplished using external logic devices are now provided by on-chip TI
solutions. For example, absolute encoder master protocol interfaces such as EnDat and BiSS are now
provided as Position Manager solutions. Configuration files, application programmer’s interface (API), and
use examples for such solutions are provided with the C2000 controlSUITE software package. In some
solutions, the TI-configured CLB is used with other on-chip resources, such as the SPI port or the C28x
CPU, to perform more complex functionality. In some cases, external communications transceivers may
need to be added. See Table 3-1 for the devices that support the CLB feature.