Datasheet

189
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
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Detailed DescriptionCopyright © 2014–2016, Texas Instruments Incorporated
6.6.3 Viterbi, Complex Math, and CRC Unit II
The VCU-II is the second-generation Viterbi, Complex Math, and CRC extension to the C28x CPU. The
VCU-II extends the capabilities of the C28x CPU by adding registers and instructions to accelerate the
performance of Fast Fourier Transforms (FFTs) and communications-based algorithms. The C28x+VCU-II
supports the following algorithm types:
• Viterbi Decoding
Viterbi decoding is commonly used in baseband communications applications. The Viterbi decode
algorithm consists of three main parts: branch metric calculations, compare-select (Viterbi butterfly),
and a traceback operation. Table 6-11 shows a summary of the VCU performance for each of these
operations.
(1) C28x CPU takes 15 cycles per butterfly.
(2) C28x CPU takes 22 cycles per stage.
Table 6-11. Viterbi Decode Performance
VITERBI OPERATION VCU CYCLES
Branch Metric Calculation (code rate = 1/2) 1
Branch Metric Calculation (code rate = 1/3) 2p
Viterbi Butterfly (add-compare-select) 2
(1)
Traceback per Stage 3
(2)
• Cyclic Redundancy Check
Cyclic redundancy check (CRC) algorithms provide a straightforward method for verifying data integrity
over large data blocks, communication packets, or code sections. The C28x+VCU can perform 8-bit,
16-bit, 24-bit, and 32-bit CRCs. For example, the VCU can compute the CRC for a block length of 10
bytes in 10 cycles. A CRC result register contains the current CRC, which is updated whenever a CRC
instruction is executed.
• Complex Math
Complex math is used in many applications, a few of which are:
– Fast Fourier Transform
The complex FFT is used in spread spectrum communications, as well as in many signal
processing algorithms.
– Complex filters
Complex filters improve data reliability, transmission distance, and power efficiency. The
C28x+VCU can perform a complex I and Q multiply with coefficients (four multiplies) in a single
cycle. In addition, the C28x+VCU can read/write the real and imaginary parts of 16-bit complex data
to memory in a single cycle.
Table 6-12 shows a summary of the VCU operations enabled by the VCU.
Table 6-12. Complex Math Performance
COMPLEX MATH OPERATION VCU CYCLES NOTES
Add or Subtract 1 32 +/- 32 = 32-bit (Useful for filters)
Add or Subtract 1 16 +/- 32 = 15-bit (Useful for FFT)
Multiply 2p 16 x 16 = 32-bit
Multiply and Accumulate (MAC) 2p 32 + 32 = 32-bit, 16 x 16 = 32-bit
RPT MAC 2p+N Repeat MAC. Single cycle after the first operation.
For more information, see the TMS320C28x Extended Instruction Sets Technical Reference Manual.