Datasheet

181
TMS320F28379S
,
TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com
SPRS881C AUGUST 2014REVISED MAY 2016
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
Detailed DescriptionCopyright © 2014–2016, Texas Instruments Incorporated
6.3.3 EMIF Chip Select Memory Map
The EMIF memory map is shown in Table 6-4.
Table 6-4. EMIF Chip Select Memory Map
EMIF CHIP SELECT SIZE START ADDRESS END ADDRESS CLA ACCESS DMA ACCESS
EMIF1_CS0n - Data 256M × 16 0x8000 0000 0x8FFF FFFF Yes
EMIF1_CS2n - Program + Data 2M × 16 0x0010 0000 0x002F FFFF Yes
EMIF1_CS3n - Program + Data 512K × 16 0x0030 0000 0x0037 FFFF Yes
EMIF1_CS4n - Program + Data 393K × 16 0x0038 0000 0x003D FFFF Yes
EMIF2_CS0n - Data 64M × 16 0x9000 0000 0x93FF FFFF
EMIF2_CS2n - Program + Data 4K × 16 0x0000 2000 0x0000 2FFF Yes (Data only)
6.3.4 Peripheral Registers Memory Map
The peripheral registers memory map can be found in Table 6-5. Registers in the peripheral frames share
a secondary master (CLA or DMA) selection with all other registers within the same peripheral frame. See
the TMS320F2837xS Delfino Microcontrollers Technical Reference Manual for details on the CPU
subsystem and secondary master selection.
Table 6-5. Peripheral Registers Memory Map
REGISTERS STRUCTURE NAME
START
ADDRESS
END
ADDRESS
PROTECTED
(1)
CLA
ACCESS
DMA
ACCESS
AdcaResultRegs ADC_RESULT_REGS 0x0000 0B00 0x0000 0B1F Yes Yes
AdcbResultRegs ADC_RESULT_REGS 0x0000 0B20 0x0000 0B3F Yes Yes
AdccResultRegs ADC_RESULT_REGS 0x0000 0B40 0x0000 0B5F Yes Yes
AdcdResultRegs ADC_RESULT_REGS 0x0000 0B60 0x0000 0B7F Yes Yes
CpuTimer0Regs CPUTIMER_REGS 0x0000 0C00 0x0000 0C07
CpuTimer1Regs CPUTIMER_REGS 0x0000 0C08 0x0000 0C0F
CpuTimer2Regs CPUTIMER_REGS 0x0000 0C10 0x0000 0C17
PieCtrlRegs PIE_CTRL_REGS 0x0000 0CE0 0x0000 0CFF
Cla1SoftIntRegs CLA_SOFTINT_REGS 0x0000 0CE0 0x0000 0CFF
Yes
CLA only,
no CPU
access
DmaRegs DMA_REGS 0x0000 1000 0x0000 11FF
Cla1Regs CLA_REGS 0x0000 1400 0x0000 147F
Peripheral Frame 1
EPwm1Regs EPWM_REGS 0x0000 4000 0x0000 40FF Yes Yes Yes
EPwm2Regs EPWM_REGS 0x0000 4100 0x0000 41FF Yes Yes Yes
EPwm3Regs EPWM_REGS 0x0000 4200 0x0000 42FF Yes Yes Yes
EPwm4Regs EPWM_REGS 0x0000 4300 0x0000 43FF Yes Yes Yes
EPwm5Regs EPWM_REGS 0x0000 4400 0x0000 44FF Yes Yes Yes
EPwm6Regs EPWM_REGS 0x0000 4500 0x0000 45FF Yes Yes Yes
EPwm7Regs EPWM_REGS 0x0000 4600 0x0000 46FF Yes Yes Yes
EPwm8Regs EPWM_REGS 0x0000 4700 0x0000 47FF Yes Yes Yes
EPwm9Regs EPWM_REGS 0x0000 4800 0x0000 48FF Yes Yes Yes
EPwm10Regs EPWM_REGS 0x0000 4900 0x0000 49FF Yes Yes Yes
EPwm11Regs EPWM_REGS 0x0000 4A00 0x0000 4AFF Yes Yes Yes
EPwm12Regs EPWM_REGS 0x0000 4B00 0x0000 4BFF Yes Yes Yes
ECap1Regs ECAP_REGS 0x0000 5000 0x0000 501F Yes Yes Yes
ECap2Regs ECAP_REGS 0x0000 5020 0x0000 503F Yes Yes Yes
ECap3Regs ECAP_REGS 0x0000 5040 0x0000 505F Yes Yes Yes
ECap4Regs ECAP_REGS 0x0000 5060 0x0000 507F Yes Yes Yes
ECap5Regs ECAP_REGS 0x0000 5080 0x0000 509F Yes Yes Yes