Datasheet

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TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881C –AUGUST 2014–REVISED MAY 2016 www.ti.com
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Specifications Copyright © 2014–2016, Texas Instruments Incorporated
5.9.3.1 eQEP Electrical Data and Timing
Table 5-63 lists the eQEP timing requirement and Table 5-64 lists the eQEP switching characteristics.
(1) For an explanation of the input qualifier parameters, see Table 5-26.
Table 5-63. eQEP Timing Requirements
(1)
MIN MAX UNIT
t
w(QEPP)
QEP input period
Synchronous 2t
c(SYSCLK)
cycles
With input qualifier 2[1t
c(SYSCLK)
+ t
w(IQSW)
] cycles
t
w(INDEXH)
QEP Index Input High time
Synchronous 2t
c(SYSCLK)
cycles
With input qualifier 2t
c(SYSCLK)
+ t
w(IQSW)
cycles
t
w(INDEXL)
QEP Index Input Low time
Synchronous 2t
c(SYSCLK)
cycles
With input qualifier 2t
c(SYSCLK)
+ t
w(IQSW)
cycles
t
w(STROBH)
QEP Strobe High time
Synchronous 2t
c(SYSCLK)
cycles
With input qualifier 2t
c(SYSCLK)
+ t
w(IQSW)
cycles
t
w(STROBL)
QEP Strobe Input Low time
Synchronous 2t
c(SYSCLK)
cycles
With input qualifier 2t
c(SYSCLK)
+ t
w(IQSW)
cycles
Table 5-64. eQEP Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER MIN MAX UNIT
t
d(CNTR)xin
Delay time, external clock to counter increment 4t
c(SYSCLK)
cycles
t
d(PCS-OUT)QEP
Delay time, QEP input edge to position compare sync output 6t
c(SYSCLK)
cycles