Datasheet

PWM
(B)
TZ
(A)
EPWMCLK
t
w(TZ)
t
d(TZ-PWM)
124
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881C –AUGUST 2014–REVISED MAY 2016 www.ti.com
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Specifications Copyright © 2014–2016, Texas Instruments Incorporated
5.9.2.2 ePWM Electrical Data and Timing
Table 5-59 shows the PWM timing requirements and Table 5-60 shows the PWM switching
characteristics.
(1) For an explanation of the input qualifier parameters, see Table 5-26.
Table 5-59. ePWM Timing Requirements
(1)
MIN MAX UNIT
t
w(SYNCIN)
Sync input pulse width
Asynchronous 2t
c(EPWMCLK)
cycles
Synchronous 2t
c(EPWMCLK)
cycles
With input qualifier 1t
c(EPWMCLK)
+ t
w(IQSW)
cycles
Table 5-60. ePWM Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER MIN MAX UNIT
t
w(PWM)
Pulse duration, PWMx output high/low 20 ns
t
w(SYNCOUT)
Sync output pulse width 8t
c(SYSCLK)
cycles
t
d(TZ-PWM)
Delay time, trip input active to PWM forced high
Delay time, trip input active to PWM forced low
Delay time, trip input active to PWM Hi-Z
25 ns
(1) For an explanation of the input qualifier parameters, see Table 5-26.
5.9.2.2.1 Trip-Zone Input Timing
Table 5-61 shows the trip-zone input timing requirements. Figure 5-50 shows the PWM Hi-Z
characteristics.
Table 5-61. Trip-Zone Input Timing Requirements
(1)
MIN MAX UNIT
t
w(TZ)
Pulse duration, TZx input low
Asynchronous 1t
c(EPWMCLK)
cycles
Synchronous 2t
c(EPWMCLK)
cycles
With input qualifier 1t
c(EPWMCLK)
+ t
w(IQSW)
cycles
A. TZ: TZ1, TZ2, TZ3, TRIP1–TRIP12
B. PWM refers to all the PWM pins in the device. The state of the PWM pins after TZ is taken high depends on the PWM
recovery software.
Figure 5-50. PWM Hi-Z Characteristics