Datasheet

Offset Error
111
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
Table 5-55 shows the CMPSS DAC static electrical characteristics. Figure 5-39 shows the CMPSS DAC
static offset. Figure 5-40 shows the CMPSS DAC static gain. Figure 5-41 shows the CMPSS DAC static
linearity.
(1) Includes comparator input referred errors.
(2) Disturbance error may be present on the CMPSS DAC output for a certain amount of time after a comparator trip.
(3) Per active CMPSS module.
Table 5-55. CMPSS DAC Static Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CMPSS DAC output range
Internal reference 0 V
DDA
V
External reference 0 VDAC
Static offset error
(1)
–25 25 mV
Static gain error
(1)
–2 2 % of FSR
Static DNL Endpoint corrected >–1 4 LSB
Static INL Endpoint corrected –16 16 LSB
Settling time
Settling to 1 LSB after full-scale output
change
1 µs
Resolution 12 bits
CMPSS DAC output disturbance
(2)
Error induced by comparator trip or
CMPSS DAC code change within the
same CMPSS module
–100 100 LSB
CMPSS DAC disturbance time
(2)
200 ns
VDAC reference voltage When VDAC is reference 2.4 2.5 or 3.0 V
DDA
V
VDAC load
(3)
When VDAC is reference 6 kΩ
Figure 5-39. CMPSS DAC Static Offset