Datasheet

SYSCLK
ADCTRIG
ADCSOCFLG.SOC0
ADCSOCFLG.SOC1
ADC S+H
ADCCLK
SOC0
Input on SOC0.CHSEL
Input on SOC1.CHSEL
ADCRESULT0
ADCRESULT1
ADCINTFLG.ADCINTx
SOC1
(old data)
(old data)
Sample n
Sample n+1
Sample n
Sample n+1
t
SH
t
LAT
t
EOC
t
INT
105
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S
SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
Table 5-51. ADC Timings in 12-Bit Mode (SYSCLK Cycles)
ADCCLK PRESCALE SYSCLK CYCLES
ADCCLK
CYCLES
ADCCTL2
[PRESCALE]
RATIO
ADCCLK:SYSCLK
t
EOC
t
LAT
t
INT(EARLY)
t
INT(LATE)
t
EOC
0 1 11 13 1 11 11.0
1 1.5 Invalid
2 2 21 23 1 21 10.5
3 2.5 26 28 1 26 10.4
4 3 31 34 1 31 10.3
5 3.5 36 39 1 36 10.3
6 4 41 44 1 41 10.3
7 4.5 46 49 1 46 10.2
8 5 51 55 1 51 10.2
9 5.5 56 60 1 56 10.2
10 6 61 65 1 61 10.2
11 6.5 66 70 1 66 10.2
12 7 71 76 1 71 10.1
13 7.5 76 81 1 76 10.1
14 8 81 86 1 81 10.1
15 8.5 86 91 1 86 10.1
Figure 5-33. ADC Timings for 12-Bit Mode