Datasheet

103
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
www.ti.com SPRS881C –AUGUST 2014–REVISED MAY 2016
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SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
Table 5-50 shows the parasitic capacitance on each channel. Also, enabling a comparator adds
approximately 1.4 pF of capacitance on positive comparator inputs and 2.5 pF of capacitance on negative
comparator inputs.
Table 5-50. Per-Channel Parasitic Capacitance
ADC CHANNEL
C
p
(pF)
COMPARATOR DISABLED COMPARATOR ENABLED
ADCINA0 12.9 N/A
ADCINA1 10.3 N/A
ADCINA2 5.9 7.3
ADCINA3 6.3 8.8
ADCINA4 5.9 7.3
ADCINA5 6.3 8.8
ADCINB0 117.0 N/A
ADCINB1 10.6 N/A
ADCINB2 5.9 7.3
ADCINB3 6.2 8.7
ADCINB4 5.2 N/A
ADCINB5 5.1 N/A
ADCINC2 5.5 6.9
ADCINC3 5.8 8.3
ADCINC4 5.0 6.4
ADCINC5 5.3 7.8
ADCIND0 5.3 6.7
ADCIND1 5.7 8.2
ADCIND2 5.3 6.7
ADCIND3 5.6 8.1
ADCIND4 4.3 N/A
ADCIND5 4.3 N/A
ADCIN14 8.6 10.0
ADCIN15 9.0 11.5
These input models should be used along with actual signal source impedance to determine the
acquisition window duration. See the Choosing an Acquisition Window Duration section of the
TMS320F2837xS Delfino Microcontrollers Technical Reference Manual for more information.
The user should analyze the ADC input setting assuming worst-case initial conditions on C
h
. This will
require assuming that C
h
could start the S+H window completely charged to V
REFHI
or completely
discharged to V
REFLO
. When the ADC transitions from an odd-numbered channel to an even-numbered
channel, or vice-versa, the actual initial voltage on C
h
will be close to being completely discharged to
V
REFLO
. For even-to-even or odd-to-odd channel transitions, the initial voltage on C
h
will be close to the
voltage of the previously converted channel.