Datasheet
28
29
27
30
21
20
22
19
18
13
12
14
11
4
5
3
6
7
26 15
25 16
31 10
32 9
232
241
178
DIO_6
VSS
DIO_5
RESET_N
VSS
VDDS_DCDC
DCDC_SW
DIO_7
VDDR_RF
X24M_N
X24M_P
VSS
VDDR
DIO_9
VDDS
DIO_8
DIO_1
JTAG_TMSC
DIO_2
DCOUPL
VDDS2
JTAG_TCKC
DIO_3
DIO_4
RF_P
RF_N
VSS
X32K_Q2
VSS
DIO_0
RX_TX
X32K_Q1
11
CC2650
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SWRS158B –FEBRUARY 2015–REVISED JULY 2016
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Terminal Configuration and FunctionsCopyright © 2015–2016, Texas Instruments Incorporated
(1) See technical reference manual (listed in Section 8.3) for more details.
(2) Do not supply external circuitry from this pin.
4.5 Pin Diagram – RSM Package
Note: I/O pins marked in bold have high drive capabilities. I/O pins marked in italics have analog capabilities.
Figure 4-3. RSM Package
32-Pin VQFN
(4-mm × 4-mm) Pinout, 0.4-mm Pitch
4.6 Signal Descriptions – RSM Package
Table 4-3. Signal Descriptions – RSM Package
NAME NO. TYPE DESCRIPTION
DCDC_SW 18 Power
Output from internal DC-DC.
(1)
. Tie to ground for external regulator mode
(1.7-V to 1.95-V operation)
DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor
(2)
DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability
DIO_3 15 Digital I/O GPIO, High drive capability, JTAG_TDO
DIO_4 16 Digital I/O GPIO, High drive capability, JTAG_TDI
DIO_5 22 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_6 23 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_7 24 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_8 25 Digital/Analog I/O GPIO, Sensor Controller, Analog
DIO_9 26 Digital/Analog I/O GPIO, Sensor Controller, Analog
JTAG_TMSC 13 Digital I/O JTAG TMSC
JTAG_TCKC 14 Digital I/O JTAG TCKC
RESET_N 21 Digital Input Reset, active-low. No internal pullup.
RF_N 2 RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P 1 RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX