Datasheet
10
CC2650
SWRS158B –FEBRUARY 2015–REVISED JULY 2016
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Terminal Configuration and Functions Copyright © 2015–2016, Texas Instruments Incorporated
Table 4-2. Signal Descriptions – RHB Package (continued)
NAME NO. TYPE DESCRIPTION
(3) If internal DC-DC is not used, this pin is supplied internally from the main LDO.
(4) If internal DC-DC is not used, this pin must be connected to VDDR for supply from the main LDO.
RESET_N 19 Digital input Reset, active-low. No internal pullup.
RF_N 2 RF I/O
Negative RF input signal to LNA during RX
Negative RF output signal to PA during TX
RF_P 1 RF I/O
Positive RF input signal to LNA during RX
Positive RF output signal to PA during TX
RX_TX 3 RF I/O Optional bias pin for the RF LNA
VDDR 29 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC
(3)(2)
VDDR_RF 32 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC-DC
(2)(4)
VDDS 28 Power 1.8-V to 3.8-V main chip supply
(1)
VDDS2 11 Power 1.8-V to 3.8-V GPIO supply
(1)
VDDS_DCDC 18 Power 1.8-V to 3.8-V DC-DC supply
X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1
X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2
X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1
X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2
EGP Power Ground – Exposed Ground Pad