Datasheet

V
IN+
V
OUT
V
GE
0V
-15V
+15V
V
E
Q1 Q2
V
CC2
12.3V
2V
Q2R
PD
Failsafe
Low
11.1V
+
-
V
C
V
CC2
12.3V Q1a
Q1b
Q2aQ2b
V
OUT
V
E
15V
15V
V
GE
V
E
Off
Gate
Drive
On
UVLO
Q2Q1 Q1
ISO5500
V
EE-P
V
EE-L
ISO5500
www.ti.com SLLSE64C –SEPTEMBER 2011–REVISED JUNE 2013
Figure 58. Under Voltage Lockout (UVLO) Function
Because V
CC2
with respect to V
E
represents the gate-on voltage, V
GE-ON
= V
CC2
– V
E
, the UVLO comparator
compares V
CC2
to a 12.3 V reference voltage that is also referenced to V
E
via the connection of the ISO5500 V
E
-
pin to the emitter potential of the power device.
The comparator hysteresis is 1.2 V typical and the typical values for the positive and negative going input
threshold voltages are V
TH+
= 12.3 V and V
TH–
= 11.1 V.
The timing diagram shows that at V
CC2
levels below 2 V V
OUT
is 0 V. Because none of the internal circuitry
operates at such low supply levels, an internal 100 kΩ pull-down resistor is used to pull V
OUT
down to V
EE-P
potential. This initial weak clamping, known as failsafe-low output, strengthens with rising V
CC2
. Above 2 V the
Q2-pair starts conducting gradually until V
CC2
reaches 12.3 V at which point the logic states of the control inputs
V
IN+
and V
IN–
begin to determine the state of V
OUT
.
Another UVLO event takes place should V
CC2
drop slightly below 11 V while the IGBT is actively driven. At that
moment the UVLO comparator output causes the gate-drive logic to turn off Q1 and turn on Q2. Now V
OUT
is
clamped hard to V
EE-P
. This condition remains until V
CC2
returns to above 12.3 V and normal operation
commences.
NOTE
An Under Voltage Lockout does not indicate a Fault condition.
DESATURATION FAULT DETECTION (DESAT)
The DESAT fault detection prevents IGBT destruction due to excessive collector currents during a short circuit
fault. Short circuits caused by user misconnect, bad wiring, or overload conditions induced by the load can cause
a rapid increase in IGBT current, leading to excessive power dissipation and heating. IGBTs become damaged
when the current load approaches the saturation current of the device and the collector-emitter voltage, V
CE
,
rises above the saturation voltage level, V
CE-sat
. The drastically increased power dissipation overheats and
destroys the IGBT.
To prevent damage to IGBT applications, the implemented fault detection slowly reduces the overcurrent in a
controlled manner during the fault condition.
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Links :ISO5500