Datasheet

375
375
60
.
+
-
D
DE
Y
Z
W
W
W
V
CC2
0 or 3 V
GND2
V
OD
V =
-7 V to 12 V
TEST
0 or
I
I
V
I
D
DE
Y
Z
V
Z
V
Y
V
OD
I
Y
I
Z
GND2GND1
V
CC1
V
CC1
GND2GND1
R
L
V
OC
Z
V
Z
V
Y
Y
V
OC(SS)
OC(p-p)
V
Generator: PRR= 100 kHz, 50 % duty
cycle, t
r
< 6ns , t
f
<6 ns , Z
O
= 50
W
Input
Input
I
I
V
I
D
DE
Y
Z
V
OD
27
±1%
W
V
CC1
GND1 GND2
GND2
GND1
I
Y
I
Z
V
Z
V
Y
V
OC
27
±1%
W
R
L
=
54
L = 50pF
50
D
Y
Z
DE
V
I
Input
Generator
±
20%
±
1
%
W
W
Generator: PRR = 100 kHz, 50 % duty
cycle
,
t
r
< 6ns , t
f
<6 ns, Z
O
= 50
W
includes fixture and
instrumentation capacitance
C
L
C
V
CC1
GND1
V
OD
50%
3 V
t
f
t
r
t
pLH
10%
90%
V
I
90%
10%
50%
50 %50 %
V
OD
V
OD(H)
V
OD(L)
t
pHL
C
L
= 50 pF
Input
Generator
50
S 1
R
L
= 110
CL includes fixture and
instrumentation
capacitance
D
Y
Z
DE
±
20 %
V
O
V
I
1 %
±
W
W
GND1
GND2
50%
50%
3 V
V
OH
0 V
t
pZH
50%
90%
0 V
V
O
V
I
»
Generator: PRR = 50 kHz, 50% duty
cycle, t <6ns, t <6ns, Z = 50
r f O
W
t
pHZ
D S1
3 V Y
0 V Z
ISO3086T
SLLSE27C –JANUARY 2011– REVISED JULY 2011 www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 2. Driver V
OD
Test and Current Definitions Figure 3. Driver V
OD
With Common-Mode Loading
Test Circuit
Figure 4. Test Circuit and Waveform Definitions For The Driver Common-Mode Output Voltage
Figure 5. Driver Switching Test Circuit and Voltage Waveforms
Figure 6. Driver High-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms
6 Copyright © 2011, Texas Instruments Incorporated