Datasheet

ISO124
7
SBOS074C
www.ti.com
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PGA102
ISO124
ISO150
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15 15
+15V –15V +15V –15V
V
IN
V
OUT
A
0
A
1
above 250kHz, the behavior is similar to that of a sampling
amplifier. The typical characteristic “Signal Response to
Inputs Greater Than 250kHz” shows this behavior graphi-
cally; at input frequencies above 250kHz, the device gener-
ates an output signal component of reduced magnitude at a
frequency below 250kHz. This is the aliasing effect of sam-
pling at frequencies less than 2 times the signal frequency
(the Nyquist frequency). Note that at the carrier frequency
and its harmonics, both the frequency and amplitude of the
aliasing go to zero.
ISOLATION MODE VOLTAGE INDUCED ERRORS
IMV can induce errors at the output as indicated by the plots of IMV
vs Frequency. It should be noted that if the IMV frequency exceeds
250kHz, the output also will display spurious outputs (aliasing) in
a manner similar to that for V
IN
> 250kHz and the amplifier
response will be identical to that shown in the “Signal Response to
Inputs Greater Than 250kHz” typical characteristic. This occurs
because IMV-induced errors behave like input-referred error sig-
nals. To predict the total error, divide the isolation voltage by the
IMR shown in the “IMR versus Frequency” typical performance
curve and compute the amplifier response to this input-referred
error signal from the data given in the “Signal Response to Inputs
Greater Than 250kHz” typical characteristic. For example, if a
800kHz 1000Vrms IMR is present, then a total of
[(–60dB) + (–30dB)] x (1000V) = 32mV error signal at 200kHz plus
a 1V, 800kHz error signal will be present at the output.
HIGH IMV dV/dt ERRORS
As the IMV frequency increases and the dV/dt exceeds
1000V/µs, the sense amp may start to false trigger, and the
output will display spurious errors. The common-mode cur-
rent being sent across the barrier by the high slew rate is the
cause of the false triggering of the sense amplifier. Lowering
the power-supply voltages below ±15V may decrease the
dV/dt to 500V/µs for typical performance.
HIGH VOLTAGE TESTING
Texas Instruments has adopted a partial discharge test
criterion that conforms to the German VDE0884 Optocoupler
Standards. This method requires the measurement of minute
current pulses (< 5pC) while applying 2400Vrms, 60Hz high-
voltage stress across every ISO124 isolation barrier. No
partial discharge may be initiated to pass this test. This
criterion confirms transient overvoltage (1.6 x 1500Vrms)
protection without damage to the ISO124. Lifetest results
verify the absence of failure under continuous rated voltage
and maximum temperature.
This new test method represents the “state-of-the art” for
non-destructive high-voltage reliability testing. It is based on
the effects of non-uniform fields that exist in heterogeneous
dielectric material during barrier degradation. In the case of
void non-uniformities, electric field stress begins to ionize the
void region before bridging the entire high-voltage barrier.
The transient conduction of charge during and after the
ionization can be detected externally as a burst of 0.01-0.1µs
current pulses that repeat on each ac voltage cycle. The
minimum ac barrier voltage that initiates partial discharge is
defined as the “inception voltage.” Decreasing the barrier
voltage to a lower level is required before partial discharge
ceases and is defined as the “extinction voltage.” We have
characterized and developed the package insulation pro-
cesses to yield an inception voltage in excess of 2400Vrms
so that transient overvoltages below this level will not dam-
age the ISO124. The extinction voltage is above 1500Vrms
so that even overvoltage induced partial discharge will cease
once the barrier voltage is reduced to the 1500Vrms (rated)
level. Older high-voltage test methods relied on applying a
large enough overvoltage (above rating) to break down
marginal parts, but not so high as to damage good ones. Our
new partial discharge testing gives us more confidence in
barrier reliability than breakdown/no breakdown criteria.
FIGURE 3. Programmable-Gain Isolation Channel with Gains
of 1, 10, and 100.
FIGURE 2. Basic Signal and Power Connections.
+V
S1
+V
S2
Gnd
Gnd
V
IN
V
OUT
–V
S1
±V
S1
±V
S2
–V
S2
1µF1µF
1µF
1µF
Isolation Barrier
ISO124