Datasheet

D1
D2
t
BBM
90%
10%
10%
90%
t
r_D
t
f_D
t
f_D
t
r_D
t
BBM
D
R
DE
V
CC1
1 kW
RE
54 W
V
CC2
GND1
V
TEST
GND2
C
L
=15 pF
(includesprobeand
jigcapacitance)
A
B
GND 1
S1
2.0V
0.8V
Success / failcriterion :
stabileV
OH
orV
OL
outputs.
V orV
OH OL
C=0.1 F
±1%
m
V orV
OH OL
C=0.1 F±1%m
ISO1176T
www.ti.com SLLSE28F –OCTOBER 2010–REVISED OCTOBER 2012
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 20. Common-Mode Transient Immunity Test Circuit
Figure 21. Transition Times and Break-Before-Make Time Delay for D1, D2 Outputs
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