Datasheet

10 kW
OPA333
±10 mV
Adjustment Range
100 W
100 W
100 Am
1/2 REF200
100 Am
1/2 REF200
V+
V-
R
G
INA827
REF
V
O
V
IN-
V
IN+
INA827
www.ti.com SBOS631A –JUNE 2012–REVISED JULY 2013
OFFSET TRIMMING
Most applications require no external offset adjustment; however, if necessary, adjustments can be made by
applying a voltage to the REF terminal. Figure 55 shows an optional circuit for trimming the output offset voltage.
The voltage applied to the REF terminal is summed at the output. The op amp buffer provides low impedance at
the REF terminal to preserve good common-mode rejection.
Figure 55. Optional Trimming of Output Offset Voltage
INPUT COMMON-MODE RANGE
The linear input voltage range of the INA827 input circuitry extends from the negative supply voltage to 1 V
below the positive supply, while maintaining 88-dB (minimum) common-mode rejection throughout this range.
The common-mode range for most common operating conditions is described in Figure 14 and Figure 35 through
Figure 38. The INA827 can operate over a wide range of power supplies and V
REF
configurations, thus making a
comprehensive guide to common-mode range limits for all possible conditions impractical to provide.
The most commonly overlooked overload condition occurs when a circuit exceeds the output swing of A
1
and A
2
,
which are internal circuit nodes that cannot be measured. Calculating the expected voltages at the output of A
1
and A
2
(see Figure 56) provides a check for the most common overload conditions. The A
1
and A
2
designs are
identical and the outputs can swing to within approximately 100 mV of the power-supply rails. For example, when
the A
2
output is saturated, A
1
may continue to be in linear operation and responding to changes in the
noninverting input voltage. This difference may give the appearance of linear operation but the output voltage is
invalid.
A single-supply instrumentation amplifier has special design considerations. To achieve a common-mode range
that extends to single-supply ground, the INA827 employs a current-feedback topology with PNP input
transistors; see Figure 56. The matched PNP transistors (Q
1
and Q
2
) shift the input voltages of both inputs up by
a diode drop and (through the feedback network) shift the output of A
1
and A
2
by approximately +0.8 V. With
both inputs and V
REF
at single-supply ground (negative power supply), the output of A
1
and A
2
is well within the
linear range, allowing differential measurements to be made at the GND level. As a result of this input level-
shifting, the voltages at pins 2 and 3 are not equal to the respective input terminal voltages (pins 1 and 4). For
most applications, this inequality is not important because only the gain-setting resistor connects to these pins.
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