Datasheet

INA3221

SBOS576A –MAY 2012–REVISED JUNE 2013

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Critical Alert Channel 3 Limit Register (Address = 0Bh, Read/Write)

BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NAME C3L12 C3L11 C3L10 C3L9 C3L8 C3L7 C3L6 C3L5 C3L4 C3L3 C3L2 C3L1 C3L0 — — —

POR

0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0

VALUE

This register contains the value used to compare to each shunt voltage conversion on channel 3 to detect fast

overcurrent events.

Warning Alert Channel 3 Limit Register (Address = 0Ch, Read/Write)

BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NAME W3L12 W3L11 W3L10 W3L9 W3L8 W3L7 W3L6 W3L5 W3L4 W3L3 W3L2 W3L1 W3L0 — — —

POR

0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0

VALUE

This register contains the value used to compare to the averaged shunt voltage value of channel 3 to detect a

longer duration overcurrent event.

Shunt Voltage Sum Register (Address = 0Dh, Read-Only)

BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NAME SIGN SV13 SV12 SV11 SV10 SV9 SV8 SV7 SV6 SV5 SV4 SV3 SV2 SV1 SV0 —

POR

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

VALUE

This register contains the sum of the single conversion shunt voltages of the selected channels based on the

summation control bits 12, 13, and 14 in the Mask/Enable Register.

This register is updated with the most recent sum following each complete cycle of all selected channels. The

Shunt Voltage Sum Register LSB value is 40 µV.

Shunt Voltage Sum Limit Register (Address = 0Eh, Read/Write)

BIT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

NAME SIGN SVL13 SVL12 SVL11 SVL10 SVL9 SVL8 SVL7 SVL6 SVL5 SVL4 SVL3 SVL2 SVL1 SVL0 —

POR

0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0

VALUE

This register contains the value used to compare the Shunt Voltage following each completed cycle of all

selected channels to detect for system overcurrent events. The Shunt Voltage Sum Limit Register LSB value is

40 µV.

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