Datasheet

SB
Ch
1
SB
Ch
2
SB
Ch
3
SB
Ch
1
SB
Ch
2
SB
Ch
3
SB
Ch
1
SB
Ch
2
SB
Ch
3
SB
Ch
1
SB
Ch
2
SB
Ch
3
SB
Ch
1
SB
Ch
2
SB
Ch
3
Signal
Channel
1.2 V Detected on Channel 1
Bus Voltage Measurement
Measure For 1.2 V on
Channel 2 Bus Voltage
2.2 ms
28.6 ms
Note (1): R
DIV
can be used to level shift High PV output.
Power Valid
Detection
INA3321
V
S
PV
VPU
R
PU
R
PU
R
DIV
(1)
INA3221
SBOS576A MAY 2012REVISED JUNE 2013
www.ti.com
The Power Valid output pin allows for a 0-V output that indicates a power invalid condition. An output equal to
the pull-up supply voltage connected to VPU indicates a power valid condition, as shown in Figure 25. It is also
possible to divide down the High Power Valid pull-up voltage by adding a resistor to ground at the PV output,
thus allowing this function to interface with lower-voltage circuitry if needed.
(1) R
DIV
can be used to level shift the PV output high.
Figure 25. Power Valid Output Structure
Timing Control Alert
The INA3221 has a Timing Control Alert function helps verify proper power-supply sequencing. On power-up, the
default INA3221 setting is Continuous Shunt and Bus Voltage conversion mode. While in this mode at power-up,
the INA3221 internally begins comparing the channel 1 bus voltage to determine when a 1.2-V level is reached.
This comparison is made each time the sequence returns to the channel 1 bus voltage measurement. When a
1.2-V level is detected on the channel 1 bus voltage measurement, the INA3221 begins looking for a 1.2-V level
present on the channel 2 bus voltage measurement. After a 1.2-V level is detected on channel 1, if the INA3221
does not detect a 1.2-V value or greater on the bus voltage measurement following four complete cycles of all
three channels, the Timing Control Alert pin is asserted low to indicate that the INA3221 is has not detected a
valid power rail on channel 2. This sequence allows for approximately 28.6 ms, as shown in Figure 26, from the
time 1.2 V is detected on channel 1 for a valid voltage to be detected on channel 2. Figure 27 illustrates the state
diagram for the Timing Control Alert pin.
NOTE: The signal refers to the corresponding shunt (S) and bus (B) voltage measurement for each channel.
Figure 26. Timing Control Timing Diagram
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