Datasheet

0.48
0.44
0.40
0.36
0.32
0.28
0.24
0.20
0.16
0.12
0.08
0.04
0
0
2
4 6 8
10 12 14 16 18 20 22
V (V)
OUT
V (mV)
SENSE
24
INA271V
OUT
Limit
(1)
V
CM2
V
CM1
V
CM3
V
CM4
V ,V
CM2
CM3
CM4
,andV illustratethevariance
fromparttopartoftheV thatcancauseCM
maximumV withV <20mV.
OUT SENSE
V limitatV =0mV,
OUT SENSE
0 V£
CM1 S
£ V
NOTE:(1)INA271V Limit=0.4V.INA270V Limit=0.28V.
OUT OUT
Ideal
INA270
INA271
www.ti.com
SBOS381C FEBRUARY 2007REVISED MAY 2010
Low V
SENSE
Case 2: V
SENSE
< 20mV, 0V V
CM
V
S
SHUTDOWN
This region of operation is the least accurate for the
The INA270 and INA271 do not provide a shutdown
INA270 family. To achieve the wide input
pin; however, because they consume a quiescent
common-mode voltage range, these devices use two
current less than 1mA, they can be powered by either
op amp front ends in parallel. One op amp front end
the output of logic gates or by transistor switches to
operates in the positive input common-mode voltage
supply power. Driving the gate low shuts down the
range, and the other in the negative input region. For
INA270–INA271. Use a totem-pole output buffer or
this case, neither of these two internal amplifiers
gate that can provide sufficient drive along with 0.1mF
dominates and overall loop gain is very low. Within
bypass capacitor, preferably ceramic with good
this region, V
OUT
approaches voltages close to linear
high-frequency characteristics. This gate should have
operation levels for Normal Case 2.
a supply voltage of 3V or greater because the INA270
and INA271 require a minimum supply greater than
This deviation from linear operation becomes greatest
2.7V. In addition to eliminating quiescent current, this
the closer V
SENSE
approaches 0V. Within this region,
gate also turns off the 10mA bias current present at
as V
SENSE
approaches 20mV, device operation is
each of the inputs. Note that the IN+ and IN– inputs
closer to that described by Normal Case 2. Figure 18
are able to withstand full common-mode voltage
illustrates this behavior for the INA271. The V
OUT
under all powered and under-powered conditions. An
maximum peak for this case is determined by
example shutdown circuit is illustrated in Figure 19.
maintaining a constant V
S
, setting V
SENSE
= 0mV, and
sweeping V
CM
from 0V to V
S
. The exact V
CM
at which
RFI/EMI
V
OUT
peaks during this case varies from part to part.
The maximum peak voltage for the INA270 is 0.28V;
Attention to good layout practices is always
for the INA271, the maximum peak voltage is 0.4V.
recommended. Keep traces short and, when
possible, use a printed circuit board (PCB) ground
plane with surface-mount components placed as
close to the device pins as possible. Small ceramic
capacitors placed directly across amplifier inputs can
reduce RFI/EMI sensitivity. PCB layout should locate
the amplifier as far away as possible from RFI
sources. Sources can include other components in
the same system as the amplifier itself, such as
inductors (particularly switched inductors handling a
lot of current and at high frequencies). RFI can
generally be identified as a variation in offset voltage
or dc signal levels with changes in the interfering RF
signal. If the amplifier cannot be located away from
sources of radiation, shielding may be needed.
Twisting wire input leads makes them more resistant
to RF fields. The difference in input pin location of the
INA270 and INA271 versus the INA193–INA198 may
provide different EMI performance.
Figure 18. Example for Low V
SENSE
Case 2
(INA271, Gain = 20)
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