Datasheet
Frame 1 Two-Wire Slave Address Byte
(1)
Frame 2 Register Pointer Byte
Start By
Master
ACK By
INA230
ACK By
INA230
1 9 1
ACK By
INA230
1
D15 D14 D13 D12 D11 D10 D9 D8
9
9
SDA
SCL
1 0 0 A3 A2
A1 A0 R/W P7 P6 P5 P4 P3 P2 P1 P0
Frame 4 Data LSByteFrame 3 Data MSByte
ACK By
INA230
Stop By
Master
1
D7 D6 D5 D4 D3 D2 D1 D0
9
Frame 1 Two-Wire Slave Address Byte
(1)
Frame 2 Data MSByte
(2)
1
Start By
Master
ACK By
INA230
ACK By
Master
From
INA230
1 9 1
9
SDA
SCL
0 0 A3 R/
W D15 D14 D13 D12 D11 D10 D9 D8
A2 A1 A0
Frame 3 Data LSByte
(2)
StopNo ACK By
(3)
Master
From
INA230
1
9
D7 D6 D5 D4 D3 D2 D1 D0
INA230
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SBOS601 –FEBRUARY 2012
WRITING TO/READING FROM THE INA230
Accessing a specific register on the INA230 is accomplished by writing the appropriate value to the register
pointer. Refer to Table 2 for a complete list of registers and corresponding addresses. The value for the register
pointer (shown in Figure 27) is the first byte transferred after the slave address byte with the R/W bit low. Every
write operation to the INA230 requires a value for the register pointer.
Writing to a register begins with the first byte transmitted by the master. This byte is the slave address, with the
R/W bit low. The INA230 then acknowledges receipt of a valid address. The next byte transmitted by the master
is the address of the register that data will be written to. This register address value updates the register pointer
to the desired register. The next two bytes are written to the register addressed by the register pointer. The
INA230 acknowledges receipt of each data byte. The master may terminate data transfer by generating a start or
stop condition.
When reading from the INA230, the last value stored in the register pointer by a write operation determines
which register is read during a read operation. To change the register pointer for a read operation, a new value
must be written to the register pointer. This write is accomplished by issuing a slave address byte with the R/W
bit low, followed by the register pointer byte. No additional data are required. The master then generates a start
condition and sends the slave address byte with the R/W bit high to initiate the read command. The next byte is
transmitted by the slave and is the most significant byte of the register indicated by the register pointer. This byte
is followed by an ACK from the master; then the slave transmits the least significant byte. The master
acknowledges receipt of the data byte. The master may terminate data transfer by generating a
Not-Acknowledge bit (No ACK) after receiving any data byte, or generating a start or stop condition. If repeated
reads from the same register are desired, it is not necessary to continually send the register pointer bytes; the
INA230 retains the register pointer value until it is changed by the next write operation.
Figure 24 and Figure 25 show the write and read operation timing diagrams, respectively. Note that register
bytes are sent most-significant byte first, followed by the least significant byte.
(1) The value of the slave address byte is determined by the settings of the A0 and A1 pins. Refer to Table 7.
Figure 24. Timing Diagram for Write Word Format
(1) The value of the slave address byte is determined by the settings of the A0 and A1 pins. Refer to Table 7.
(2) Read data are from the last register pointer location. If a new register is desired, the register pointer must be updated.
See Figure 27.
(3) ACK by Master can also be sent.
Figure 25. Timing Diagram for Read Word Format
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