Datasheet

INA226
www.ti.com SBOS547 –JUNE 2011
SMBus Alert Response
The INA226 is designed to respond to the SMBus Alert Response address. The SMBus Alert Response provides
a quick fault identification for simple slave devices. When an Alert occurs, the master can broadcast the Alert
Response slave address (0001 100) with the Read/Write bit set high. Following this Alert Response, any slave
devices that generated an alert will identify themselves by acknowledging the Alert Response and sending their
respective address on the bus.
The Alert Response can activate several different slave devices simultaneously, similar to the I
2
C General Call. If
more than one slave attempts to respond, bus arbitration rules apply. The losing device does not generate an
Acknowledge and continues to hold the Alert line low until the interrupt is cleared.
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