Datasheet
8
®
INA2132
12 (10)
13 (9)
14 (8)
INA2132
ADS7806
(1)
2 (6)
3 (5)
4
11
+5V
–In
12 Bits
Out
0V-4V
Input
+In
τ
S
= 45µs (4V Step to 0.01%)
NOTE: (1) For 16-bit output, use ADS7809.
FIGURE 4. Differential Input Voltage-to-Current Converter
for Low I
OUT
.
FIGURE 5. Differential Input Data Acquisition.
FIGURE 3. Low Power, High Output Current Precision
Difference Amplifier.
CAPACITIVE LOAD DRIVE CAPABILITY
The INA2132 can drive large capacitive loads, even at low
supplies. It is stable with a 10nF load. Refer to the “Small-
Signal Step Response” and “Settling Time vs Load Capaci-
tance” typical performance curves.
CHANNEL CROSSTALK
The two channels of the INA2132 are completely indepen-
dent, including all bias circuitry. At dc and low frequency,
there is virtually no signal coupling between channels.
Crosstalk increases with frequency and is dependent on
source impedance and signal characteristics. See the typical
performance curve “Channel Separation vs Frequency” for
more information.
Most crosstalk is produced by capacitive coupling of signals
from one channel to the input section of the other channel.
To minimize coupling, separate the input traces as far as
practical from any signals associated with the opposite
channel. A grounded guard trace surrounding the inputs
helps reduce stray coupling between channels. Run the
differential inputs of each channel parallel to each other or
directly adjacent on the top and bottom sides of a circuit
board. Stray coupling then produces a common-mode signal
which is rejected by the INA2132’s input.
12 (10)
13 (9)
14 (8)
INA2132
BUF634
2 (6)
3 (5)
V
O
R
L
–In
+In
(Low I
Q
mode)
BUF634 inside feedback
loop contributes no error.
12 (10)
13 (9)
3 (5)
INA2132
2 (6)
14 (8)
V
3
V
2
Load
I
O
= (V
3
– V
2
)/R
I
O
R
12 (10)
13 (9)
3 (5)
14 (8)
INA2132
2 (6)
1
V
O
DG188
V
1
Logic
In
Logic In
0
1
V
O
–V
1
+V
1
FIGURE 6. Digitally Controlled Gain of ±1 Amplifier.
FIGURE 7. Precision Voltage-to-Current Converter with
Differential Inputs.
12 (10)
13 (9)
3 (5)
INA2132
2 (6)
14 (8)
V
1
V
2
Load
I
O
= (V
1
– V
2
) (1/40k + 1/R)
I
O
R
R