Datasheet

Bus Under-Voltage Warning Register 10h (Read/Write)
INA209
www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009
Bit Descriptions
BWO: Sets the bus over-voltage warning limit.
Bits 15 – 3 If a Bus Voltage Register (04h) value exceeds this limit, the WOV bit of the Status Register (01h) is set to '1' and
the Warning pin asserts if the WRNEN bit is set.
WPL: The Warning Polarity bit sets the Warning pin polarity.
Bit 1 1 = Inverted (active-high open collector)
0 = Normal (active-low open collector) (default)
WNL: The Warning Latch bit configures the latching feature of the Warning pin.
Bit 0 1 = Latch enabled
0 = Transparent (default)
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT
BWU12 BWU11 BWU10 BWU9 BWU8 BWU7 BWU6 BWU5 BWU4 BWU3 BWU2 BWU1 BWU0 — — —
NAME
POR
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
Bit Descriptions
BWU: Sets the bus over-voltage warning limit.
Bits 15 – 3 If a Bus Voltage Register (04h) value is below this limit, the WUV bit of the Status Register (01h) is set to '1' and
the Warning pin asserts if the WRNEN bit is set.
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