Datasheet

INA209
SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com
Bit Descriptions (continued)
CRIT+: Critical Shunt Positive Voltage
Bit 7 This bit is set to '1' when the value of the shunt voltage exceeds the positive limit set in the Critical DAC+ Register
(14h).
CRIT – : Critical Shunt Negative Voltage
Bit 6 This bit is set to '1' when the value of the shunt voltage is more negative than the negative limit set in the Critical
DAC – Register (15h).
CNVR: Conversion Ready
Bit 5 Although the INA209 can be read at any time, and the data from the last conversion are available, the Conversion
Ready line is provided to help coordinate one-shot or triggered conversions. The Conversion bit is set after all
conversions, averaging, and multiplications are complete. Conversion Ready clears under the following conditions:
1. Writing the Configuration Register (except for Power-Down or Disable mode selections).
2. Reading the Status Register.
3. Trigger a single-shot conversion with the Convert pin.
SMBA: SMBus Alert
Bit 4 Clears only on reading Status Register or by disabling SMBus Alert function.
OVF: Math Overflow
Bit 3 This bit is set to '1' if an arithmetic operation resulted in an overflow error. It indicates that current and power data
may be meaningless. It does not set any watchdog outputs.
32 Submit Documentation Feedback Copyright © 2007 – 2009, Texas Instruments Incorporated
Product Folder Link(s): INA209