Datasheet
Critical Comparator PGA Function
Compatibility with TI Hot Swap Controllers
Filtering and Input Considerations
INA209
www.ti.com
......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009
The Critical Comparator function is included to If larger full-scale shunt voltages are desired, the
provide the fastest possible response to overload INA209 provides a PGA function that increases the
events. This function bypasses the digital circuit by full-scale range up to 2, 4, or 8 times (320mV).
capturing the event in the analog domain. Additionally, the bus voltage measurement has two
full-scale ranges: 16V or 32V.
The Critical Comparator responds only to shunt
voltage, and can be programmed for a value from
0mV to 255mV (in 1mV increments) in the Critical
DAC+ and Critical DAC – Registers. Two thresholds
The INA209 is designed for compatibility with hot
are provided, allowing users to set different
swap controllers such the TI TPS2490 . The TPS2490
thresholds in systems where bi-directional current
uses a high-side shunt with a limit at 50mV; the
measurement occurs. For example, a power supply
INA209 full-scale range of 40mV enables the use of
may readily allow sourcing of 10A, but must indicate
the same shunt for current sensing below this limit.
an alarm whenever sinking more than 1A. The
When sensing is required at (or through) the 50mV
SMBus Alert Mask/Enable Control Register allows the
sense point of the TPS2490, the PGA of the INA209
user to enable or disable the Critical pin output
can be set to ÷ 2 to provide an 80mV full-scale range.
through the CREN bit. The CREN bit affects only the
A typical application connects the Critical pin output
Critical pin; it does not affect the CRIT+ or CRIT –
to the TPS2490 enable line; this configuration
flags within the Status Register.
enables user-programmable current limits. Note that
The Critical Comparator output filter is set by the CF
the latched mode should be used for the Critical pin
bits of the Critical DAC – Register. This filter
output to avoid oscillation at the trip level.
determines the duration of time that the CMP output
must be continuously active (not toggling) to
propagate to the Critical pin output and set the CRIT+
Measuring current is often noisy, and such noise can
or CRIT – flags within the Status Register.
be difficult to define. The INA209 offers several
While the Critical Comparator output filter provides
options for filtering by choosing resolution and
settings from 0ms to 0.96ms, the CMP is actually
averaging in the Configuration Register. These
strobed every 4 µ s, providing multiple samples per
filtering options can be set independently for either
delay period. For the Critical output pin to become
voltage or current measurement.
active, the critical condition must be true for every
The internal ADC is based on a delta-sigma ( Δ Σ )
sample during the specified delay period.
front-end with a 500kHz ( ± 10%) typical sampling rate.
When using the Critical Comparator in unidirectional
This architecture has good inherent noise rejection;
applications, where the Critical DAC – Register is
however, transients that occur at or very close to the
unused, the Comparator could trip in error if the input
sampling rate harmonics can cause problems.
is near zero, because the comparator can have an
Because these signals are at 1MHz and higher, they
offset of up to ± 1.5mV. Noise also contributes to false
can be dealt with by incorporating filtering at the input
tripping. To avoid false tripping in unidirectional
of the INA209. The high frequency enables the use of
applications, the Critical DAC – should be
low-value series resistors on the filter for negligible
programmed to a value beyond – 2mV to account for
effects on measurement accuracy. Figure 22 shows
the offset, and an additional amount to provide a
the INA209 with an additonal filter added at the input.
noise margin. Alternatively, the Critical DAC – can be
programmed to negative full-scale range ( – 255mV),
in order to eliminate false tripping.
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