INA209 INA 209 www.ti.com .........................................................................................................................................................
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 ELECTRICAL CHARACTERISTICS: VS = +3.3V Boldface limits apply over the specified temperature range, TA = –25°C to +85°C. At TA = +25°C, VIN+ = 12V, VSENSE = (VIN+ – VIN–) = 32mV, PGA = ÷ 1, and BRNG (1) = 1, unless otherwise noted.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS: VS = +3.3V (continued) Boldface limits apply over the specified temperature range, TA = –25°C to +85°C. At TA = +25°C, VIN+ = 12V, VSENSE = (VIN+ – VIN–) = 32mV, PGA = ÷ 1, and BRNG = 1, unless otherwise noted.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 PIN CONFIGURATION INA209 Top View VIN+ 1 16 SMBus Alert VIN- 2 15 A1 Convert 3 14 A0 GND 4 13 SDA VS+ 5 12 SCL GPIO 6 11 GND Critical 7 10 VS+ Overlimit 8 9 Warning PIN DESCRIPTIONS PIN NO. NAME DESCRIPTION 1 VIN+ Positive differential shunt voltage.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C, VIN+ = 12V, VSENSE = (VIN+ – VIN–) = 32mV, PGA = ÷ 1, and BRNG = 1, unless otherwise noted.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN+ = 12V, VSENSE = (VIN+ – VIN–) = 32mV, PGA = ÷ 1, and BRNG = 1, unless otherwise noted. CRITICAL COMPARATOR FULL-SCALE ERROR vs TEMPERATURE CRITICAL COMPARATOR OFFSET vs TEMPERATURE 1.0 0.8 0.8 0.6 0.6 Offset (mV) 0.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VIN+ = 12V, VSENSE = (VIN+ – VIN–) = 32mV, PGA = ÷ 1, and BRNG = 1, unless otherwise noted. SHUTDOWN IQ vs I2C CLOCK FREQUENCY 400 350 300 IQ (mA) 250 200 VS = 5V 150 100 VS = 3V 50 0 1k 10k 100k 1M 10M SCL Frequency (Hz) Figure 13.
Copyright © 2007–2009, Texas Instruments Incorporated Product Folder Link(s): INA209 Bus Voltage Channel Shunt Voltage Channel ADC (1) (1) (1) (1) (2) Data Registers PGA (In Configuration Register) Shunt Voltage Full-Scale Calibration Current Bus Voltage Power CMP CMP ´ ´ DAC DAC (2) (2) Peak-Hold Registers Shunt Voltage- Peak (2) (2) Shunt Voltage+ Peak Bus Voltage (2) Minimum Peak Bus Voltage (2) Maximum Peak Power Peak Critical DAC- (2) Critical DAC Hysteresis Critical
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com APPLICATION INFORMATION The INA209 is a digital current-shunt monitor with an I2C and SMBus-compatible interface. It provides digital current, voltage, and power readings necessary for accurate decision-making in precisely-controlled systems.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Serial Bus Address WRITING TO/READING FROM THE INA209 To communicate with the INA209, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.
INA209 www.ti.com .........................................................................................................................................................
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com High-Speed I2C Mode The master then generates a repeated start condition (a repeated start condition has the same timing as the start condition). After this repeated start condition, the protocol is the same as F/S mode, except that transmission speeds up to 3.4Mbps are allowed.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Power-Up Conditions BASIC ADC FUNCTIONS Power-up conditions apply to a software reset via the RST bit (bit 15) in the Configuration Register, or the I2C bus General Call Reset. At device power up, all Status bits are masked. Warning, Over-Limit, Critical, and SMBus Alert functions are disabled.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com When the INA209 is in the normal operating mode (that is, MODE bits of the Configuration Register are set to '111'), it continuously converts the shunt voltage up to the number set in the shunt voltage averaging function (Configuration Register, SADC bits).
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Critical Comparator PGA Function The Critical Comparator function is included to provide the fastest possible response to overload events. This function bypasses the digital circuit by capturing the event in the analog domain.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Current Shunt Load Supply RFILTER 10W RFILTER 10W Supply Voltage 0.1mF to 1mF Ceramic Capcitor 3.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 quick fault identification for simple slave devices. When an ALERT occurs, the master can broadcast the alert response slave address (0001 100). Following this alert response, any slave devices that generated interrupts identify themselves by putting the respective addresses on the bus.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com External Circuitry for Additional VBUS Input The INA209 GPIO can be used to control an external circuit to switch the VBUS measurement to an alternate location.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 PROGRAMMING THE INA209 POWER MEASUREMENT ENGINE Calibration Register and Scaling The Calibration Register makes it possible to set the scaling of the Current and Power Registers to whatever values are most useful for a given application.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com 6. Calculate the Power LSB, using Equation 5. Equation 5 shows a general formula; because the bus voltage measurement LSB is always 4mV, the power formula reduces to the calculated result. Power_LSB = 20 Current_LSB Power_LSB = 400 ´ 10-6 (5) 7.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Step1 Optional Step9 Equ9 Step2 Equ1 Step3 Step4 Equ2, 3 Step5 Equ4 Step7 Equ6, 7 Step6 Equ4 Step8 Equ8 Figure 25.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Calibration Example 2 (Overflow Possible) This design example uses the nine-step procedure for calibrating the INA209 where overflow is possible. Figure 26 illustrates how the same procedure is performed using the automated INA209EVM software.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 7. Compute the maximum current and shunt voltage values (before overflow), as shown by Equation 15 and Equation 16. Note that both Equation 15 and Equation 16 involve an If - then condition. Max_Current = Current_LSB ´ 32767 Max_Current = 0.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Step1 Optional Step9 Equ18 Step2 Equ10 Step3 Step4 Equ11, 12 Step5 Equ13 Step7 Equ15, 16 Step6 Equ14 Step8 Equ17 Figure 26.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 REGISTER INFORMATION The INA209 uses a bank of registers for holding configuration settings, measurement results, maximum/minimum limits, and status information. Table 2 summarizes the INA209 registers; Figure 14 illustrates registers.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Table 2. Summary of Register Set (continued) POINTER ADDRESS REGISTER NAME FUNCTION BINARY HEX TYPE (1) 10 Bus Under-Voltage Warning Warning watchdog register. Sets low Bus voltage limit that triggers a warning flag in the Status Register and activates Warning pin.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 REGISTER DETAILS All INA209 registers are 16-bit registers. 16-bit register data are sent in two 8-bit bytes via the I2C interface.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com SADC: SADC Shunt ADC Resolution/Averaging Bits 3–6 These bits adjust the Shunt ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used when averaging results for the Shunt Voltage Register (03h).
INA209 www.ti.com .........................................................................................................................................................
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Bit Descriptions (continued) CRIT+: Critical Shunt Positive Voltage Bit 7 This bit is set to '1' when the value of the shunt voltage exceeds the positive limit set in the Critical DAC+ Register (14h).
INA209 www.ti.com .........................................................................................................................................................
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com DATA OUTPUT REGISTERS Shunt Voltage Register 03h (Read-Only) The Shunt Voltage Register stores the current shunt voltage reading, VSHUNT. Shunt Voltage Register bits are shifted according to the PGA setting selected in the Configuration Register (00h).
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Table 6. Shunt Voltage Register Format (1) VSHUNT Reading (mV) Decimal Value PGA = ÷ 8 (D15…..................D0) PGA = ÷ 4 (D15…..................D0) PGA = ÷ 2 (D15…..................D0) PGA = ÷ 1 (D15…..................D0) 320.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Bus Voltage Register 04h (Read-Only) The Bus Voltage Register stores the most recent bus voltage reading, VBUS. At full-scale range = 32V (decimal = 8000, hex = 1F40), and LSB = 4mV.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 PEAK-HOLD REGISTERS Note: All peak-hold registers are cleared and reset to POR values by writing a '1' into the respective D0 bits. Shunt Voltage Positive Peak Register 07h (Read/Write) Mirrors highest voltage reading of the Shunt Voltage Register (03h).
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com WARNING WATCHDOG REGISTERS These registers set warning limits that trigger flags in the Status Register and activate the Warning pin. Note: Delayed output is set in the Critical DAC– Register (15h).
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Bit Descriptions BWO: Sets the bus over-voltage warning limit. Bits 15–3 If a Bus Voltage Register (04h) value exceeds this limit, the WOV bit of the Status Register (01h) is set to '1' and the Warning pin asserts if the WRNEN bit is set.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com OVER-LIMIT/CRITICAL WATCHDOG REGISTERS These registers set the over-limit and critical DAC limits that trigger flags to be set in the Status Register and activate the Overlimit pin or the Critical pin.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Critical DAC+ Register (Critical Shunt Positive Voltage) 14h (Read/Write) No sign bit (sets a positive limit only). At full-scale range = 255mV; LSB = 1mV; 8-bit.
INA209 SBOS403B – JUNE 2007 – REVISED MARCH 2009 ......................................................................................................................................................... www.ti.com Critical DAC– Register (Critical Shunt Negative Voltage) 15h (Read/Write) No sign bit (sets negative limit only). At full-scale range = –255mV; LSB = 1mV; 8-bit.
INA209 www.ti.com ......................................................................................................................................................... SBOS403B – JUNE 2007 – REVISED MARCH 2009 Table 10. WD Settings WD3 WD2 WD1 WD0 DELAY SETTING (s) 0 0 0 0 0 0 0 0 1 0.1 0 0 1 0 0.2 0 0 1 1 0.3 0 1 0 0 0.4 0 1 0 1 0.5 0 1 1 0 0.6 0 1 1 1 0.7 1 0 0 0 0.8 1 0 0 1 0.9 1 0 1 0 1.0 1 0 1 1 1.1 1 1 0 0 1.2 1 1 0 1 1.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device INA209AIPWR Package Package Pins Type Drawing TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA209AIPWR TSSOP PW 16 2000 367.0 367.0 35.
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