Datasheet

INA163
SBOS177D
7
www.ti.com
FIGURE 3. Offset Voltage Adjustment Circuit.
FIGURE 2. Input Stabilization Network.
V+
V−
V
O
8
4
3
12
5
11
6
10
9
V
IN−
V
IN+
INA163
47Ω
47Ω
1.2µH
1.2µH
INPUT CONSIDERATIONS
Very low source impedance (less than 10Ω) can cause
the INA163 to oscillate. This depends on circuit layout,
signal source, and input cable characteristics. An input
network consisting of a small inductor and resistor, as
shown in Figure 2, can greatly reduce any tendency to
oscillate. This is especially useful if a variety of input
sources are to be connected to the INA163. Although
not shown in other figures, this network can be used as
needed with all applications shown.
INA163
V+
V−
V
O
V+
150Ω
10kΩ
150Ω
100µA
100µA
8
4
3
12
R
G
5
10
11
6
9
V−
OPA237
+15V
−15V
V
O
±250mA
Output Drive
BW
BUF634 connected
for wide bandwidth.
8
11
6
4
5
10
9
INA163
BUF634
Sense
FIGURE 4. Buffer for Increase Output Current.
OFFSET VOLTAGE TRIM
A variable voltage applied to pin 10, as shown in
Figure 3, can be used to adjust the output offset voltage.
A voltage applied to pin 10 is summed with the output
signal. An op amp connected as a buffer is used to
provide a low impedance at pin 10 to assure good
common-mode rejection.
OUTPUT SENSE
An output sense terminal allows greater gain accuracy
in driving the load. By connecting the sense connection
at the load, I • R voltage loss to the load is included
inside the feedback loop. Current drive can be in-
creased by connecting a buffer amp inside the feed-
back loop, as shown in Figure 4.