Datasheet

10
®
INA121
INA121
R
G
100Ω
V
O
+10V
Bridge
G = 500
Ref
A
1
A
2
A
3
40kΩ40kΩ
40kΩ40kΩ
R
G
V+
V–
INA121
V
O
= G • V
D
G = 1 +
50kΩ
R
G
25kΩ
25kΩ
V
CM
–
G • V
D
2
V
D
2
V
D
2
V
CM
V
CM
+
G • V
D
2
A combination of common-mode and differential input
voltage can cause the output of A
1
or A
2
to saturate. Figure
4 shows the output voltage swing of A
1
and A
2
expressed in
terms of a common-mode and differential input voltages.
For applications where input common-mode range must be
maximized, limit the output voltage swing by connecting the
INA121 in a lower gain (see performance curve “Input
Common-Mode Voltage Range vs Output Voltage”). If
necessary, add gain after the INA121 to increase the voltage
swing.
Input-overload can produce an output voltage that appears
normal. For example, if an input overload condition drives
both input amplifiers to their positive output swing limit, the
difference voltage measured by the output amplifier will be
near zero. The output of A
3
will be near 0V even though both
inputs are overloaded.
LOW VOLTAGE OPERATION
The INA121 can be operated on power supplies as low as
±2.25V. Performance remains excellent with power supplies
ranging from ±2.25V to ±18V. Most parameters vary only
slightly throughout this supply voltage range—see typical
performance curves. Operation at very low supply voltage
requires careful attention to assure that the input voltages
remain within their linear range. Voltage swing requirements
of internal nodes limit the input common-mode range with low
power supply voltage. Typical performance curves, “Input
Common-Mode Range vs Output Voltage” show the range of
linear operation for ±15V, ±5V, and ±2.5V supplies.
INPUT FILTERING
The INA121’s FET input allows use of an R/C input filter
without creating large offsets due to input bias current.
Figure 5 shows proper implementation of this input filter to
preserve the INA121’s excellent high frequency common-
mode rejection. Mismatch of the common-mode input time
constant (R
1
C
1
and R
2
C
2
), either from stray capacitance or
mismatched values, causes a high frequency common-mode
signal to be converted to a differential signal. This degrades
common-mode rejection. The differential input capacitor,
C
3
, reduces the bandwidth and mitigates the effects of
mismatch in C
1
and C
2
. Make C
3
much larger than C
1
and
C
2
. If properly matched, C
1
and C
2
also improve ac CMR.
FIGURE 4. Voltage Swing of A
1
and A
2
.
FIGURE 5. Input Low-Pass Filter.
FIGURE 6. Bridge Transducer Amplifier.
f
−3dB
=
1
4πR
1
C
3
+
C
1
2






INA121
V
O
V
IN
–
V
IN
+
R
1
R
2
C
3
C
1
C
2
R
1
= R
2
C
1
= C
2
C
3
≈ 10C
1
FET input allows use
of large resistors and
small capacitors.
Ref