Datasheet

8
®
INA115
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation of
the INA115. Applications with noisy or high impedance
power supplies may require decoupling capacitors close to the
device pins as shown.
The output is referred to the output reference (Ref) terminal
which is normally grounded. This must be a low-impedance
connection to assure good common-mode rejection. A resis-
tance of 5 in series with the Ref pin will cause a typical
device to degrade to approximately 80dB CMR (G=1).
The INA115 has a separate output sense feedback connection
(pin 12). Pin 12 must be connected (normally to the output
terminal, pin 11) for proper operation. The output sense
connection can be used to sense the output voltage directly at
the load for best accuracy.
SETTING THE GAIN
Gain of the INA115 is set by connecting a single external
resistor, R
G
:
FIGURE 1. Basic Connections.
DESIRED R
G
NEAREST 1% R
G
GAIN ()()
1 No Connection No Connection
2 50.00k 49.9k
5 12.50k 12.4k
10 5.556k 5.62k
20 2.632k 2.61k
50 1.02k 1.02k
100 505.1 511
200 251.3 249
500 100.2 100
1000 50.05 49.9
2000 25.01 24.9
5000 10.00 10
10000 5.001 4.99
G = 1 +
50 k
R
G
(1)
Commonly used gains and resistor values are shown in
Figure 1.
For G=1, no resistor is required, but connect pins 2-3 and
connect pins 14-15. Gain peaking in G=1 can be reduced by
shorting the internal 25k feedback resistors (see typical
performance curve Gain vs Frequency). To do this, connect
pins 1-2-3 and connect pins 8-14-15.
The 50k term in equation 1 comes from the sum of the two
internal feedback resistors. These are on-chip metal film
resistors which are laser trimmed to accurate absolute values.
The accuracy and temperature coefficient of these resistors
are included in the gain accuracy and drift specifications of the
INA115.
The stability and temperature drift of the external gain setting
resistor, R
G
, also affects gain. R
G
’s contribution to gain error
and drift can be directly inferred from the gain equation (1).
Low resistor values required for high gain can make wiring
resistance important. The “force and sense” type connections
illustrated in Figure 1 help reduce the effect of interconnection
resistance.
A
1
A
2
A
3
12
11
10
25k25k
25k25k
13
7
5
4
V
IN
V
IN
R
G
V+
V–
INA115
+
Over-Voltage
Protection
25k
25k
Over-Voltage
Protection
15
14
3
2
8
V
O2
V
O1
1
Load
G = 1 +
50k
R
G
V
O
= G • (V
IN
– V
IN
)
0.1µF
0.1µF
+
V
O
Also drawn in simplified form:
Ref
INA115
V
IN
V
IN
R
G
+
V
O
V
O2
V
O1