Stellaris® LM3S1968 Evaluation Board User ’s Manual EK-LM3S196 8-03 Co pyrigh t © 2 007– 201 0 Te xas In strumen ts
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Stellaris® LM3S1968 Evaluation Board Table of Contents Chapter 1: Stellaris® LM3S1968 Evaluation Board ....................................................................................... 7 Features.............................................................................................................................................................. 8 Block Diagram .......................................................................................................................................
List of Tables Table 2-1. Table 2-2. Table B-1. Table B-2. Table B-3. 4 Stellaris LM3S1968 Evaluation Board Hardware Debugging Configurations................................ 12 Isolating On-Board Hardware........................................................................................................ 15 I/O Breakout Pads ......................................................................................................................... 27 Recommended Connectors.................................
Stellaris® LM3S1968 Evaluation Board List of Figures Figure 1-1. Figure 1-2. Figure 2-1. Figure B-1. Figure B-2. Stellaris LM3S1968 Evaluation Board Layout ................................................................................. 7 LM3S1968 Evaluation Board Block Diagram .................................................................................. 8 ICD Interface Mode .......................................................................................................................
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C H A P T E R 1 Stellaris® LM3S1968 Evaluation Board The Stellaris® LM3S1968 Evaluation Board is a compact and versatile evaluation platform for the Stellaris LM3S1968 ARM® Cortex™-M3-based microcontroller. The evaluation kit design highlights the LM3S1968 microcontroller's peripherals and its Hibernation module. A 3V lithium battery, included in the kit, supplies power to the Hibernation module and maintains data and real-time clock information for about two years in the absence of USB power.
Stellaris® LM3S1968 Evaluation Board Features The Stellaris LM3S1968 Evaluation Kit includes the following features: Stellaris LM3S1968 microcontroller Simple setup; USB cable provides serial communication, debugging, and power OLED graphics display with 128 x 96 pixel resolution User LED, navigation switches, and select pushbuttons 8Ω magnetic speaker with class D amplifier Internal 3 V battery and support for on-chip hibernation module USB interface for debugging and power supp
Stellaris® LM3S1968 Evaluation Board Evaluation Kit Contents The evaluation kit contains everything needed to develop and run applications for Stellaris microcontrollers including: LM3S1968 evaluation board (EVB) USB cable 20-pin JTAG/SWD target cable CD containing: – A supported version of one of the following (including a toolchain-specific Quickstart guide): • Keil™ RealView® Microcontroller Development Kit (MDK-ARM) • IAR Embedded Workbench • Code Sourcery GCC development tools •
Stellaris® LM3S1968 Evaluation Board Eight 10-bit ADC channels (inputs) when used as single-ended inputs Three independent integrated analog comparators Two I2C modules Three PWM generator blocks – One 16-bit counter – Two comparators – Produces two independent PWM signals – One dead-band generator 10 Two QEI modules with position integrator for tracking encoder position 5 to 52 GPIOs, depending on user configuration On-chip low drop-out (LDO) voltage regulator Hibernation m
C H A P T E R 2 Hardware Description In addition to a microcontroller, the Stellaris LM3S1968 evaluation board includes a range of useful peripherals and an integrated in-circuit debug interface (ICDI). This chapter describes how these peripherals operate and interface to the microcontroller. LM3S1968 Evaluation Board LM3S1968 Microcontroller Overview The heart of the EVB is a Stellaris LM3S1968 ARM Cortex-M3-based microcontroller.
Hardware Description Internal debug mode—By the USB device controller (U5 FT2232) when instructed by debugger The LM3S1968 microcontroller has an internal power-on reset, so the external circuits used in the EVB are not required in typical applications. Power Supplies In normal operating mode, the LM3S1968 is powered from a +3.3-V supply. A low drop-out (LDO) regulator converts +5-V power from the USB cable to +3.3-V. +3.3-V power is available for powering external circuits.
Stellaris® LM3S1968 Evaluation Board Debug In Considerations Debug Mode 3 supports evaluation board debugging using an external debug interface. Mode 3 is automatically selected when a device such as a Segger J-Link or Keil ULINK is connected. Boards marked Revision B or later automatically configure pin 1 to be a 3.3-V reference, if an external debugger is connected. To determine the revision of your board, locate the product number on the bottom of the board; for example, EK-LM3S6965-B.
Hardware Description Serial Wire Out The evaluation board supports the Cortex-M3 serial-wire output (SWO) trace capabilities. Under debugger control, the CPLD can route the SWO datastream to the virtual communication port (VCP) transmit channel. The debugger can then decode and interpret the trace information received from the VCP. The normal VCP connection to UART0 is interrupted when using SWO. Not all debuggers support SWO.
Stellaris® LM3S1968 Evaluation Board Other Peripherals Speaker The LM3S1968 evaluation board's speaker circuit can be used in either tone or waveform mode. The quick-start application uses tone mode. In tone mode, the LM3S1968 microcontroller's PWM module directly generates tones within the audible frequency range. The width of the pulses determines the volume. If only one PWM signal (PWM2 or PWM3) is used, the non-PWM signal should be configured as a general-purpose output.
Hardware Description Table 2-2. Isolating On-Board Hardware (Continued) Microcontroller Pin Microcontroller Assignment To Isolate, Remove...
Stellaris® LM3S1968 Evaluation Board The debug interface operates in either serial-wire debug (SWD) or full JTAG mode, depending on the configuration in the debugger IDE. The IDE/debugger does not distinguish between the on-EVB Stellaris microcontroller and an external Stellaris microcontroller. The only requirement is that the correct Stellaris device is selected in the project configuration.
Hardware Description 18 January 6, 2010
A P P E N D I X A Schematics This section contains the schematics for the LM3S1968 Evaluation Board: LM3S1968 Microcontroller on page 20 OLED Display, Switches and Audio on page 21 USB and Debugger Interfaces on page 22 USB, Debugger Interfaces and Power on page 23 JTAG Logic with Auto Mode Detect and Hibernate on page 24 January 6, 2010 19
LM3S1968 Microcontroller 1 2 3 4 5 6 Power Break-out Header +15V +5V +3.3V Stellaris LM3S1968 Microcontroller U1 PA0/U0Rx PA1/U0Tx PA2/SSI0CLK PA3/SSI0FSS PA4/SSI0RX PA5/SSI0TX PA6/I2C1SCL PA7/I2C1SDA A INT_TCK TMS/SWDIO PC2/TDI PC3/TDO/SWO B +3.
OLED Display, Switches and Audio 1 2 3 4 5 6 U2 +3.3V Reset A C17 R4 10K SW1 4.7UF RESET_SWn SW-B3S1000 +3.3V C18 OMIT R5 200K OLEDCSn MCURSTn OLEDDC Select/Power SW2 OLEDCLK OLEDDIN WAKEn SW-B3S1000 Up SW3 User Switches UP_SWn SW-B3S1000 +3.3V +15V Down SW4 B C19 0.
USB and Debugger Interfaces 1 2 3 4 5 Debug Interface Logic USB Interface DBG+3.3V 54819-0572 P2 TP2 PLD_TDI TP3 PLD_TDO TP4 DBG+3.3V 7 C34 USBDM USBDP .033UF ACBUS0 ACBUS1 ACBUS2 ACBUS3 SI/WUA R18 1.5K B +5V +5V R20 10K U8 VCC NC ORG GND CS SK DI DO 1 2 3 4 48 1 2 47 R21 1.5K CAT93C46 43 44 1K 64X16 1 Y3 2 +5V 4 5 6.
Schematic USB, Debugger page Interfaces 1 and Power 1 2 3 4 5 6 A A +5V U3 2 C23 4.7UF R11 1M 6 IN JP18 OUT SENSE VEN BYPASS DBG+3.3V 1 3 5 C24 4.7UF C25 0.033UF 4 GND GND 7 LP3981ILD-3.3 Debugger +3.3V 200mA Power Supply +3.3V B DBG+3.3V JP19 B OMIT R12 1M C26 4.7UF 6 IN +3.3V JP17 U4 2 OUT SENSE VEN BYPASS 1 3 5 C28 HIBERNATEn C27 4.7UF 0.033UF 4 GND GND 7 LP3981ILD-3.3 Main +3.
JTAG Logic with Auto Mode Detect and Hibernate A B C 1 D I90 SWO_EN 10 FTDI_TCK 45 DBGOUT I105 44 I85 I86 ITCK I109 41 I7 2 H 1 B A S I91 G S A B 34 F FTDI_DBG I89 VCP_TX E XTCK 2 I87 FTDI_TDI_DO 46 I6 I92 32 U0TX 24 XTDO S 3 FTDI_TDO_DI I3 B A 47 I16 JTAGEN I18 FTDI_TMS 48 I111 I4 21 4 JTAGEN I20 FTDI_DBG 5 FTDIJTAGEN 4 FTDI_SRSTn 3 3 I35 S SWDEN I36 I5 I37 I2 XTDI 4 I112 B A I17 I9 40 XTMS 5 I8 D FTDI_DBG Q DBGOUT 31 I96 6 C 7
A P P E N D I X B Connection Details This appendix contains the following sections: Component Locations Evaluation Board Dimensions I/O Breakout Pads ARM Target Pinout References Component Locations Figure B-1.
Evaluation Board Dimensions Evaluation Board Dimensions Figure B-2.
Stellaris® LM3S1968 Evaluation Board I/O Breakout Pads The LM3S1968 EVB has 58 I/O pads, 13 power pads, and 1 control connection, for a total of 71 pads. Connection can be made by soldering wires directly to these pads, or by using 0.1” pitch headers and sockets. Note: In Table B-1, an asterisk (*) by a signal name (also on the EVB PCB) indicates the signal is normally used for on-board functions.
Recommended Connectors Recommended Connectors Connection can be made by soldering wires directly to pads or using 0.1” pitch headers and sockets. Table B-2. Recommended Connectors Pins 1-66 (2 x 33 way) PCB Socket Sullins PPPC332LFBN-RC Digikey S7136-ND Pin Header Sullins PEC20DAAN Digikey S2012E-20-ND ARM Target Pinout In ICDI input and output mode, the Stellaris LM3S1968 Evaluation Kit supports ARM’s standard 20-pin JTAG/SWD configuration.
Stellaris® LM3S1968 Evaluation Board References In addition to this document, the following references are included on the Stellaris LM3S1968 Evaluation Kit CD-ROM and are also available for download at www.ti.
References 30 January 6, 2010
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