Datasheet

Figure 13-13. AES Interrupt Service
START
Read interrupt status register
Int_status = AES_IRQSTATUS
Write the next context in
context data registers
AES_KEYj_n= xxxx
AES_IV_IN_n= xxxx
Read the encrypted/decrypted data
authentication_result = AES_TAG_OUT_n
data_result = AES_DATA _IN_n
END
yes
Is interrupt caused
by context output event?
AES_IRQSTATUS [3]
CONTEXT_OUT = 0x1
no
Read the context registers
contextResult =
AES_KEYj_n
yes
Is interrupt
caused by context input?
AES_IRQSTATUS [0]
CONTEXT_IN = 0x1
In interrupt caused
by data input event?
AES_IRQSTATUS [1]
DATA _IN = 0x1
Write next data
AES_DATA _IN_n=
xxxx
no
yes no
Clear interrupt status
AES_IRQSTATUS [3:0] = 0x0
Enable interrupts
AES_IRQENABLE[3:0] = 0xF
13.5 Register Map
Table 13-5 on page 984 lists the AES registers. The AES Module comprises registers that exist at
an offset relative to the AES Module base address and a small set of AES µDMA registers that exist
at an offset relative to an Encryption Control Module base address. The AES Module register offsets
are relative to the base address 0x4403.6000. The AES µDMA interrupt registers are offset are
relative to the base address 0x4403.0000.
Table 13-5. AES Register Map
See
page
DescriptionResetTypeNameOffset
AES Module Registers (AES Module Offset)
987AES Key 2_60x0000.0000RWAES_KEY2_60x000
987AES Key 2_70x0000.0000RWAES_KEY2_70x004
987AES Key 2_40x0000.0000RWAES_KEY2_40x008
June 18, 2014984
Texas Instruments-Production Data
Advance Encryption Standard Accelerator (AES)