Datasheet

Table 2-2. Processor Register Map (continued)
See
page
DescriptionResetTypeNameOffset
94Cortex General-Purpose Register 12-RWR12-
95Stack Pointer-RWSP-
96Link Register0xFFFF.FFFFRWLR-
97Program Counter-RWPC-
98Program Status Register0x0100.0000RWPSR-
102Priority Mask Register0x0000.0000RWPRIMASK-
103Fault Mask Register0x0000.0000RWFAULTMASK-
104Base Priority Mask Register0x0000.0000RWBASEPRI-
105Control Register0x0000.0000RWCONTROL-
107Floating-Point Status Control-RWFPSC-
2.3.4 Register Descriptions
This section lists and describes the Cortex-M4F registers, in the order shown in Figure
2-3 on page 92. The core registers are not memory mapped and are accessed by register name
rather than offset.
Note: The register type shown in the register descriptions refers to type during program execution
in Thread mode and Handler mode. Debug access can differ.
93June 18, 2014
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