Datasheet
5.2.1 Device Identification .................................................................................................... 227
5.2.2 Reset Control .............................................................................................................. 228
5.2.3 Non-Maskable Interrupt ............................................................................................... 235
5.2.4 Power Control ............................................................................................................. 236
5.2.5 Clock Control .............................................................................................................. 237
5.2.6 System Control ........................................................................................................... 246
5.3 Initialization and Configuration ..................................................................................... 253
5.4 Register Map .............................................................................................................. 254
5.5 System Control Register Descriptions (System Control Offset) ....................................... 261
5.6 Cryptographic System Control Register Description (CCM Offset) .................................. 529
6 Processor Support and Exception Module ........................................................ 531
6.1 Functional Description ................................................................................................. 531
6.2 Register Map .............................................................................................................. 531
6.3 Register Descriptions .................................................................................................. 531
7 Hibernation Module .............................................................................................. 539
7.1 Block Diagram ............................................................................................................ 541
7.2 Signal Description ....................................................................................................... 541
7.3 Functional Description ................................................................................................. 542
7.3.1 Register Access Timing ............................................................................................... 543
7.3.2 Hibernation Clock Source ............................................................................................ 543
7.3.3 System Implementation ............................................................................................... 546
7.3.4 Battery Management ................................................................................................... 547
7.3.5 Real-Time Clock .......................................................................................................... 547
7.3.6 Tamper ....................................................................................................................... 550
7.3.7 Battery-Backed Memory .............................................................................................. 553
7.3.8 Power Control Using HIB ............................................................................................. 553
7.3.9 Power Control Using VDD3ON Mode ........................................................................... 554
7.3.10 Initiating Hibernate ...................................................................................................... 554
7.3.11 Waking from Hibernate ................................................................................................ 554
7.3.12 Arbitrary Power Removal ............................................................................................. 555
7.3.13 Interrupts and Status ................................................................................................... 556
7.4 Initialization and Configuration ..................................................................................... 556
7.4.1 Initialization ................................................................................................................. 556
7.4.2 RTC Match Functionality (No Hibernation) .................................................................... 557
7.4.3 RTC Match/Wake-Up from Hibernation ......................................................................... 557
7.4.4 External Wake-Up from Hibernation .............................................................................. 558
7.4.5 RTC or External Wake-Up from Hibernation .................................................................. 559
7.4.6 Tamper Initialization ..................................................................................................... 559
7.5 Register Map .............................................................................................................. 559
7.6 Register Descriptions .................................................................................................. 561
8 Internal Memory ................................................................................................... 608
8.1 Block Diagram ............................................................................................................ 608
8.2 Functional Description ................................................................................................. 610
8.2.1 SRAM ........................................................................................................................ 610
8.2.2 ROM .......................................................................................................................... 610
8.2.3 Flash Memory ............................................................................................................. 612
8.2.4 EEPROM .................................................................................................................... 623
8.2.5 Bus Matrix Memory Accesses ...................................................................................... 629
5June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller