Datasheet
Register 57: PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................ 1855
Register 58: PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................ 1855
Register 59: PWM3 Dead-Band Rising-Edge Delay (PWM3DBRISE), offset 0x12C ............................ 1855
Register 60: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................ 1856
Register 61: PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................ 1856
Register 62: PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................ 1856
Register 63: PWM3 Dead-Band Falling-Edge-Delay (PWM3DBFALL), offset 0x130 ............................ 1856
Register 64: PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074 .................................................. 1857
Register 65: PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4 .................................................. 1857
Register 66: PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4 .................................................. 1857
Register 67: PWM3 Fault Source 0 (PWM3FLTSRC0), offset 0x134 .................................................. 1857
Register 68: PWM0 Fault Source 1 (PWM0FLTSRC1), offset 0x078 .................................................. 1859
Register 69: PWM1 Fault Source 1 (PWM1FLTSRC1), offset 0x0B8 .................................................. 1859
Register 70: PWM2 Fault Source 1 (PWM2FLTSRC1), offset 0x0F8 .................................................. 1859
Register 71: PWM3 Fault Source 1 (PWM3FLTSRC1), offset 0x138 .................................................. 1859
Register 72: PWM0 Minimum Fault Period (PWM0MINFLTPER), offset 0x07C ................................... 1862
Register 73: PWM1 Minimum Fault Period (PWM1MINFLTPER), offset 0x0BC ................................... 1862
Register 74: PWM2 Minimum Fault Period (PWM2MINFLTPER), offset 0x0FC ................................... 1862
Register 75: PWM3 Minimum Fault Period (PWM3MINFLTPER), offset 0x13C ................................... 1862
Register 76: PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800 .......................................... 1863
Register 77: PWM1 Fault Pin Logic Sense (PWM1FLTSEN), offset 0x880 .......................................... 1863
Register 78: PWM2 Fault Pin Logic Sense (PWM2FLTSEN), offset 0x900 .......................................... 1863
Register 79: PWM3 Fault Pin Logic Sense (PWM3FLTSEN), offset 0x980 .......................................... 1863
Register 80: PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804 ................................................... 1864
Register 81: PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884 ................................................... 1864
Register 82: PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904 ................................................... 1864
Register 83: PWM3 Fault Status 0 (PWM3FLTSTAT0), offset 0x984 ................................................... 1864
Register 84: PWM0 Fault Status 1 (PWM0FLTSTAT1), offset 0x808 ................................................... 1866
Register 85: PWM1 Fault Status 1 (PWM1FLTSTAT1), offset 0x888 ................................................... 1866
Register 86: PWM2 Fault Status 1 (PWM2FLTSTAT1), offset 0x908 ................................................... 1866
Register 87: PWM3 Fault Status 1 (PWM3FLTSTAT1), offset 0x988 ................................................... 1866
Register 88: PWM Peripheral Properties (PWMPP), offset 0xFC0 ...................................................... 1869
Register 89: PWM Clock Configuration (PWMCC), offset 0xFC8 ........................................................ 1871
Quadrature Encoder Interface (QEI) ........................................................................................ 1872
Register 1: QEI Control (QEICTL), offset 0x000 .............................................................................. 1879
Register 2: QEI Status (QEISTAT), offset 0x004 .............................................................................. 1882
Register 3: QEI Position (QEIPOS), offset 0x008 ............................................................................ 1883
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ..................................................... 1884
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ..................................................................... 1885
Register 6: QEI Timer (QEITIME), offset 0x014 ............................................................................... 1886
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ........................................................... 1887
Register 8: QEI Velocity (QEISPEED), offset 0x01C ........................................................................ 1888
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................. 1889
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ........................................................... 1891
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ................................................... 1893
June 18, 201448
Texas Instruments-Production Data
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