Datasheet

Register 123: CRC and Cryptographic Modules Sleep Mode Clock Gating
Control (SCGCCCM), offset 0x774
The SCGCCCM register provides software the capability to enable and disable the CRC and
Encryption Control, AES, DES, and SHA/MD5 modules in sleep mode. When enabled, the modules
are provided a clock . When disabled, the clock is disabled to save power.
Important: This register should be used to control the clocking for the CRC, AES, DES, and
SHA/MD5 modules.
CRC and Cryptographic Modules Sleep Mode Clock Gating Control (SCGCCCM)
Base 0x400F.E000
Offset 0x774
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0reserved
RWROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:1
CRC and Cryptographic Modules Sleep Mode Clock Gating Control
DescriptionValue
The CRC, AES, DES, and SHA/MD5 modules are disabled in
sleep mode.
0
Enable and provide a clock to the CRC, AES, DES, and
SHA/MD5 modules in sleep mode.
1
0RWS00
June 18, 2014432
Texas Instruments-Production Data
System Control