Datasheet

Register 122: EEPROM Sleep Mode Clock Gating Control (SCGCEEPROM),
offset 0x758
The SCGCEEPROM register provides software the capability to enable and disable the EEPROM
module in sleep mode. When enabled, a module is provided a clock. When disabled, the clock is
disabled to save power.
EEPROM Sleep Mode Clock Gating Control (SCGCEEPROM)
Base 0x400F.E000
Offset 0x758
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0reserved
RWROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:1
EEPROM Module 0 Sleep Mode Clock Gating Control
DescriptionValue
EEPROM module is disabled.0
Enable and provide a clock to the EEPROM module in sleep
mode.
1
0RWS00
431June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller