Datasheet

Register 99: Analog-to-Digital Converter Run Mode Clock Gating Control
(RCGCADC), offset 0x638
The RCGCADC register provides software the capability to enable and disable the ADC modules
in Run mode. When enabled, a module is provided a clock and accesses to module registers are
allowed. When disabled, the clock is disabled to save power and accesses to module registers
generate a bus fault.
Important: This register should be used to control the clocking for the ADC modules.
Analog-to-Digital Converter Run Mode Clock Gating Control (RCGCADC)
Base 0x400F.E000
Offset 0x638
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
R0R1reserved
RWRWROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:2
ADC Module 1 Run Mode Clock Gating Control
DescriptionValue
ADC module 1 is disabled.0
Enable and provide a clock to ADC module 1 in Run mode.1
0RWR11
ADC Module 0 Run Mode Clock Gating Control
DescriptionValue
ADC module 0 is disabled.0
Enable and provide a clock to ADC module 0 in Run mode.1
0RWR00
403June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller