Datasheet
Register 12: Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC .............................. 1168
Register 13: Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ............................... 1169
Register 14: Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ............................... 1170
Register 15: Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ............................... 1171
Register 16: Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ............................... 1172
Register 17: Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................. 1173
Register 18: Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................. 1174
Register 19: Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................. 1175
Register 20: Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC ................................ 1176
Analog-to-Digital Converter (ADC) ........................................................................................... 1177
Register 1: ADC Active Sample Sequencer (ADCACTSS), offset 0x000 ........................................... 1201
Register 2: ADC Raw Interrupt Status (ADCRIS), offset 0x004 ......................................................... 1203
Register 3: ADC Interrupt Mask (ADCIM), offset 0x008 .................................................................... 1206
Register 4: ADC Interrupt Status and Clear (ADCISC), offset 0x00C ................................................ 1209
Register 5: ADC Overflow Status (ADCOSTAT), offset 0x010 .......................................................... 1213
Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014 ............................................... 1215
Register 7: ADC Underflow Status (ADCUSTAT), offset 0x018 ......................................................... 1220
Register 8: ADC Trigger Source Select (ADCTSSEL), offset 0x01C ................................................. 1221
Register 9: ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ........................................... 1223
Register 10: ADC Sample Phase Control (ADCSPC), offset 0x024 .................................................... 1225
Register 11: ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ............................... 1227
Register 12: ADC Sample Averaging Control (ADCSAC), offset 0x030 ............................................... 1229
Register 13: ADC Digital Comparator Interrupt Status and Clear (ADCDCISC), offset 0x034 ............... 1230
Register 14: ADC Control (ADCCTL), offset 0x038 ............................................................................ 1232
Register 15: ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............. 1233
Register 16: ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ...................................... 1235
Register 17: ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 .............................. 1242
Register 18: ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 .............................. 1242
Register 19: ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 .............................. 1242
Register 20: ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................. 1242
Register 21: ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ........................... 1243
Register 22: ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ........................... 1243
Register 23: ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C .......................... 1243
Register 24: ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC .......................... 1243
Register 25: ADC Sample Sequence 0 Operation (ADCSSOP0), offset 0x050 .................................... 1245
Register 26: ADC Sample Sequence 0 Digital Comparator Select (ADCSSDC0), offset 0x054 ............. 1247
Register 27: ADC Sample Sequence Extended Input Multiplexer Select 0 (ADCSSEMUX0), offset
0x058 .......................................................................................................................... 1249
Register 28: ADC Sample Sequence 0 Sample and Hold Time (ADCSSTSH0), offset 0x05C .............. 1251
Register 29: ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............. 1253
Register 30: ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............. 1253
Register 31: ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ...................................... 1254
Register 32: ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ...................................... 1254
Register 33: ADC Sample Sequence 1 Operation (ADCSSOP1), offset 0x070 .................................... 1258
Register 34: ADC Sample Sequence 2 Operation (ADCSSOP2), offset 0x090 ................................... 1258
Register 35: ADC Sample Sequence 1 Digital Comparator Select (ADCSSDC1), offset 0x074 ............. 1259
Register 36: ADC Sample Sequence 2 Digital Comparator Select (ADCSSDC2), offset 0x094 ............ 1259
June 18, 201440
Texas Instruments-Production Data
Table of Contents