Datasheet

Register 12: EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 903
Register 13: EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 904
Register 14: EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 904
Register 15: EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 905
Register 16: EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 905
Register 17: EPI Status (EPISTAT), offset 0x060 ................................................................................ 907
Register 18: EPI Read FIFO Count (EPIRFIFOCNT), offset 0x06C ...................................................... 909
Register 19: EPI Read FIFO (EPIREADFIFO0), offset 0x070 ............................................................... 910
Register 20: EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074 .................................................... 910
Register 21: EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078 .................................................... 910
Register 22: EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C ................................................... 910
Register 23: EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080 .................................................... 910
Register 24: EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084 .................................................... 910
Register 25: EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088 .................................................... 910
Register 26: EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C ................................................... 910
Register 27: EPI FIFO Level Selects (EPIFIFOLVL), offset 0x200 ........................................................ 911
Register 28: EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204 ...................................................... 913
Register 29: EPI DMA Transmit Count (EPIDMATXCNT), offset 0x208 ................................................. 914
Register 30: EPI Interrupt Mask (EPIIM), offset 0x210 ......................................................................... 915
Register 31: EPI Raw Interrupt Status (EPIRIS), offset 0x214 .............................................................. 917
Register 32: EPI Masked Interrupt Status (EPIMIS), offset 0x218 ........................................................ 919
Register 33: EPI Error and Interrupt Status and Clear (EPIEISC), offset 0x21C .................................... 921
Register 34: EPI Host-Bus 8 Configuration 3 (EPIHB8CFG3), offset 0x308 .......................................... 923
Register 35: EPI Host-Bus 16 Configuration 3 (EPIHB16CFG3), offset 0x308 ....................................... 926
Register 36: EPI Host-Bus 8 Configuration 4 (EPIHB8CFG4), offset 0x30C .......................................... 930
Register 37: EPI Host-Bus 16 Configuration 4 (EPIHB16CFG4), offset 0x30C ...................................... 933
Register 38: EPI Host-Bus 8 Timing Extension (EPIHB8TIME), offset 0x310 ......................................... 937
Register 39: EPI Host-Bus 16 Timing Extension (EPIHB16TIME), offset 0x310 ..................................... 939
Register 40: EPI Host-Bus 8 Timing Extension (EPIHB8TIME2), offset 0x314 ....................................... 941
Register 41: EPI Host-Bus 16 Timing Extension (EPIHB16TIME2), offset 0x314 ................................... 943
Register 42: EPI Host-Bus 8 Timing Extension (EPIHB8TIME3), offset 0x318 ....................................... 945
Register 43: EPI Host-Bus 16 Timing Extension (EPIHB16TIME3), offset 0x318 ................................... 947
Register 44: EPI Host-Bus 8 Timing Extension (EPIHB8TIME4), offset 0x31C ...................................... 949
Register 45: EPI Host-Bus 16 Timing Extension (EPIHB16TIME4), offset 0x31C .................................. 951
Register 46: EPI Host-Bus PSRAM (EPIHBPSRAM), offset 0x360 ....................................................... 953
Cyclical Redundancy Check (CRC) ............................................................................................ 954
Register 1: CRC Control (CRCCTRL), offset 0x400 ........................................................................... 958
Register 2: CRC SEED/Context (CRCSEED), offset 0x410 ................................................................ 960
Register 3: CRC Data Input (CRCDIN), offset 0x414 ......................................................................... 961
Register 4: CRC Post Processing Result (CRCRSLTPP), offset 0x418 ............................................... 962
Advance Encryption Standard Accelerator (AES) .................................................................... 963
Register 1: AES Key 2_6 (AES_KEY2_6), offset 0x000 ..................................................................... 987
Register 2: AES Key 2_7 (AES_KEY2_7), offset 0x004 ..................................................................... 987
Register 3: AES Key 2_4 (AES_KEY2_4), offset 0x008 ..................................................................... 987
Register 4: AES Key 2_5 (AES_KEY2_5), offset 0x00C .................................................................... 987
Register 5: AES Key 2_2 (AES_KEY2_2), offset 0x010 ..................................................................... 987
Register 6: AES Key 2_3 (AES_KEY2_3), offset 0x014 ..................................................................... 987
Register 7: AES Key 2_0 (AES_KEY2_0), offset 0x018 ..................................................................... 987
June 18, 201436
Texas Instruments-Production Data
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