Datasheet

Register 8: GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 775
Register 9: GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 777
Register 10: GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 778
Register 11: GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 780
Register 12: GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 781
Register 13: GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 782
Register 14: GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 783
Register 15: GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 784
Register 16: GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 786
Register 17: GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 788
Register 18: GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 789
Register 19: GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 791
Register 20: GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 792
Register 21: GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 794
Register 22: GPIO Port Control (GPIOPCTL), offset 0x52C ................................................................. 795
Register 23: GPIO ADC Control (GPIOADCCTL), offset 0x530 ............................................................ 797
Register 24: GPIO DMA Control (GPIODMACTL), offset 0x534 ........................................................... 798
Register 25: GPIO Select Interrupt (GPIOSI), offset 0x538 .................................................................. 799
Register 26: GPIO 12-mA Drive Select (GPIODR12R), offset 0x53C .................................................... 800
Register 27: GPIO Wake Pin Enable (GPIOWAKEPEN), offset 0x540 .................................................. 801
Register 28: GPIO Wake Level (GPIOWAKELVL), offset 0x544 ........................................................... 803
Register 29: GPIO Wake Status (GPIOWAKESTAT), offset 0x548 ....................................................... 805
Register 30: GPIO Peripheral Property (GPIOPP), offset 0xFC0 .......................................................... 807
Register 31: GPIO Peripheral Configuration (GPIOPC), offset 0xFC4 ................................................... 808
Register 32: GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 811
Register 33: GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 812
Register 34: GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 813
Register 35: GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 814
Register 36: GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 815
Register 37: GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 816
Register 38: GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 817
Register 39: GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 818
Register 40: GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 819
Register 41: GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 820
Register 42: GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 821
Register 43: GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 822
External Peripheral Interface (EPI) ............................................................................................. 823
Register 1: EPI Configuration (EPICFG), offset 0x000 ....................................................................... 865
Register 2: EPI Main Baud Rate (EPIBAUD), offset 0x004 ................................................................. 867
Register 3: EPI Main Baud Rate (EPIBAUD2), offset 0x008 ............................................................... 869
Register 4: EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 .............................................. 871
Register 5: EPI Host-Bus 8 Configuration (EPIHB8CFG), offset 0x010 ............................................... 873
Register 6: EPI Host-Bus 16 Configuration (EPIHB16CFG), offset 0x010 ........................................... 878
Register 7: EPI General-Purpose Configuration (EPIGPCFG), offset 0x010 ........................................ 884
Register 8: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014 .......................................... 887
Register 9: EPI Host-Bus 16 Configuration 2 (EPIHB16CFG2), offset 0x014 ....................................... 893
Register 10: EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 900
Register 11: EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 903
35June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller