Datasheet
Register 151: Synchronous Serial Interface Power Control (PCSSI), offset 0x91C .................................. 477
Register 152: Inter-Integrated Circuit Power Control (PCI2C), offset 0x920 ............................................ 479
Register 153: Universal Serial Bus Power Control (PCUSB), offset 0x928 .............................................. 483
Register 154: Ethernet PHY Power Control (PCEPHY), offset 0x930 ..................................................... 485
Register 155: Controller Area Network Power Control (PCCAN), offset 0x934 ........................................ 487
Register 156: Analog-to-Digital Converter Power Control (PCADC), offset 0x938 .................................... 489
Register 157: Analog Comparator Power Control (PCACMP), offset 0x93C ............................................ 491
Register 158: Pulse Width Modulator Power Control (PCPWM), offset 0x940 ......................................... 493
Register 159: Quadrature Encoder Interface Power Control (PCQEI), offset 0x944 ................................. 495
Register 160: EEPROM Power Control (PCEEPROM), offset 0x958 ...................................................... 497
Register 161: CRC and Cryptographic Modules Power Control (PCCCM), offset 0x974 .......................... 499
Register 162: Ethernet MAC Power Control (PCEMAC), offset 0x99C .................................................... 501
Register 163: Watchdog Timer Peripheral Ready (PRWD), offset 0xA00 ................................................ 503
Register 164: 16/32-Bit General-Purpose Timer Peripheral Ready (PRTIMER), offset 0xA04 ................... 504
Register 165: General-Purpose Input/Output Peripheral Ready (PRGPIO), offset 0xA08 ......................... 506
Register 166: Micro Direct Memory Access Peripheral Ready (PRDMA), offset 0xA0C ........................... 509
Register 167: EPI Peripheral Ready (PREPI), offset 0xA10 ................................................................... 510
Register 168: Hibernation Peripheral Ready (PRHIB), offset 0xA14 ....................................................... 511
Register 169: Universal Asynchronous Receiver/Transmitter Peripheral Ready (PRUART), offset
0xA18 ........................................................................................................................... 512
Register 170: Synchronous Serial Interface Peripheral Ready (PRSSI), offset 0xA1C ............................. 514
Register 171: Inter-Integrated Circuit Peripheral Ready (PRI2C), offset 0xA20 ....................................... 516
Register 172: Universal Serial Bus Peripheral Ready (PRUSB), offset 0xA28 ......................................... 519
Register 173: Ethernet PHY Peripheral Ready (PREPHY), offset 0xA30 ................................................ 520
Register 174: Controller Area Network Peripheral Ready (PRCAN), offset 0xA34 ................................... 521
Register 175: Analog-to-Digital Converter Peripheral Ready (PRADC), offset 0xA38 ............................... 522
Register 176: Analog Comparator Peripheral Ready (PRACMP), offset 0xA3C ....................................... 523
Register 177: Pulse Width Modulator Peripheral Ready (PRPWM), offset 0xA40 .................................... 524
Register 178: Quadrature Encoder Interface Peripheral Ready (PRQEI), offset 0xA44 ............................ 525
Register 179: EEPROM Peripheral Ready (PREEPROM), offset 0xA58 ................................................. 526
Register 180: CRC and Cryptographic Modules Peripheral Ready (PRCCM), offset 0xA74 ..................... 527
Register 181: Ethernet MAC Peripheral Ready (PREMAC), offset 0xA9C ............................................... 528
Register 182: Unique ID 0 (UNIQUEID0), offset 0xF20 .......................................................................... 529
Register 183: Unique ID 1 (UNIQUEID1), offset 0xF24 .......................................................................... 529
Register 184: Unique ID 2 (UNIQUEID2), offset 0xF28 .......................................................................... 529
Register 185: Unique ID 3 (UNIQUEID3), offset 0xF2C ......................................................................... 529
Register 186: Cryptographic Modules Clock Gating Request (CCMCGREQ), offset 0x204 ...................... 530
Processor Support and Exception Module ............................................................................... 531
Register 1: System Exception Raw Interrupt Status (SYSEXCRIS), offset 0x000 ................................ 532
Register 2: System Exception Interrupt Mask (SYSEXCIM), offset 0x004 ........................................... 534
Register 3: System Exception Masked Interrupt Status (SYSEXCMIS), offset 0x008 ........................... 536
Register 4: System Exception Interrupt Clear (SYSEXCIC), offset 0x00C ........................................... 538
Hibernation Module ..................................................................................................................... 539
Register 1: Hibernation RTC Counter (HIBRTCC), offset 0x000 ......................................................... 562
Register 2: Hibernation RTC Match 0 (HIBRTCM0), offset 0x004 ....................................................... 563
Register 3: Hibernation RTC Load (HIBRTCLD), offset 0x00C ........................................................... 564
Register 4: Hibernation Control (HIBCTL), offset 0x010 ..................................................................... 565
Register 5: Hibernation Interrupt Mask (HIBIM), offset 0x014 ............................................................. 570
31June 18, 2014
Texas Instruments-Production Data
Tiva
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TM4C129ENCPDT Microcontroller