Datasheet
Figure 30-2. JTAG Test Clock Input Timing
TCK
J6 J5
J3 J4
J2
Figure 30-3. JTAG Test Access Port (TAP) Timing
TDO Output Valid
TCK
TDO Output Valid
J12
TDO
TDI
TMS
TDI Input Valid TDI Input Valid
J13
J9 J10
TMS Input Valid
J9 J10
TMS Input Valid
J11
J7 J8J8J7
1949June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller