Datasheet

29 Signal Tables
The following tables list the signals available for each pin. Signals are configured as GPIOs on reset,
except for those noted below. Use the GPIOAMSEL register (see page 794) to select analog mode.
For a GPIO pin to be used for an alternate digital function, the corresponding bit in the GPIOAFSEL
register (see page 778) must be set. Further pin muxing options are provided through the PMCx bit
field in the GPIOPCTL register (see page 795), which selects one of several available peripheral
functions for that GPIO.
Important: Table 10-1 on page 751 shows special consideration GPIO pins. Most GPIO pins are
configured as GPIOs and tri-stated by default (GPIOAFSEL=0, GPIODEN=0,
GPIOPDR=0, GPIOPUR=0, and GPIOPCTL=0). Special consideration pins may be
programed to a non-GPIO function or may have special commit controls out of reset.
In addition, a Power-On-Reset (POR) returns these GPIO to their original special
consideration state.
Table 29-1. GPIO Pins With Special Considerations
GPIOCRGPIOPCTLGPIOPURGPIOPDRGPIODENGPIOAFSELDefault Reset
State
GPIO Pins
00x11011JTAG/SWDPC[3:0]
00x00000GPIO
a
PD[7]
00x00000GPIO
a
PE[7]
a. This pin is configured as a GPIO by default but is locked and can only be reprogrammed by unlocking the
pin in the GPIOLOCK register and uncommitting it by setting the GPIOCR register.
Table 29-2 on page 1897 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Each possible alternate analog and digital function is listed for each pin.
Table 29-3 on page 1909 lists the signals in alphabetical order by signal name. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed. The "Pin Mux" column indicates
the GPIO and the encoding needed in the PMCx bit field in the GPIOPCTL register.
Table 29-4 on page 1921 groups the signals by functionality, except for GPIOs. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed.
Table 29-5 on page 1932 lists the GPIO pins and their analog and digital alternate functions. The AINx
analog signals go through an isolation circuit before reaching their circuitry. These signals are
configured by clearing the corresponding DEN bit in the GPIO Digital Enable (GPIODEN) register
and setting the corresponding AMSEL bit in the GPIO Analog Mode Select (GPIOAMSEL) register.
Other analog signals are 3.3-V tolerant and are connected directly to their circuitry (C0-, C0+, C1-,
C1+, C2-, C2+, USB0VBUS, USB0ID). These signals are configured by clearing the DEN bit in the
GPIO Digital Enable (GPIODEN) register. The digital signals are enabled by setting the appropriate
bit in the GPIO Alternate Function Select (GPIOAFSEL) and GPIODEN registers and configuring
the PMCx bit field in the GPIO Port Control (GPIOPCTL) register to the numeric enoding shown in
the table below. Table entries that are shaded gray are the default values for the corresponding
GPIO pin.
Table 29-6 on page 1935 lists the signals based on number of possible pin assignments. This table
can be used to plan how to configure the pins for a particular functionality. Application Note AN01274
Configuring Tiva™ C Series Microcontrollers with Pin Multiplexing provides an overview of the pin
muxing implementation, an explanation of how a system designer defines a pin configuration, and
examples of the pin configuration process.
June 18, 20141896
Texas Instruments-Production Data
Signal Tables