Datasheet
Figure 30-8. POR-BOR V
DD
Droop Response ...................................................................... 1954
Figure 30-9. Digital Power-On Reset Timing ......................................................................... 1955
Figure 30-10. Brown-Out Reset Timing .................................................................................. 1956
Figure 30-11. External Reset Timing (RST) ............................................................................ 1956
Figure 30-12. Software Reset Timing ..................................................................................... 1956
Figure 30-13. Watchdog Reset Timing ................................................................................... 1956
Figure 30-14. MOSC Failure Reset Timing ............................................................................. 1957
Figure 30-15. Hibernation Module Timing ............................................................................... 1970
Figure 30-16. ESD Protection ................................................................................................ 1975
Figure 30-17. ESD Protection for Non-Power Pins (Except WAKE Signal) ................................ 1976
Figure 30-18. SDRAM Initialization and Load Mode Register Timing ........................................ 1978
Figure 30-19. SDRAM Read Timing ....................................................................................... 1978
Figure 30-20. SDRAM Write Timing ....................................................................................... 1979
Figure 30-21. Host-Bus 8/16 Asynchronous Mode Read Timing ............................................... 1980
Figure 30-22. Host-Bus 8/16 Asynchronous Mode Write Timing ............................................... 1980
Figure 30-23. Host-Bus 8/16 Mode Asynchronous Muxed Read Timing .................................... 1981
Figure 30-24. Host-Bus 8/16 Mode Asynchronous Muxed Write Timing .................................... 1981
Figure 30-25. General-Purpose Mode Read and Write Timing ................................................. 1982
Figure 30-26. PSRAM Single Burst Read ............................................................................... 1983
Figure 30-27. PSRAM Single Burst Write ............................................................................... 1984
Figure 30-28. ADC External Reference Filtering ..................................................................... 1990
Figure 30-29. ADC Input Equivalency .................................................................................... 1990
Figure 30-30. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing
Measurement .................................................................................................. 1992
Figure 30-31. Master Mode SSI Timing for SPI Frame Format (FRF=00), with SPH=1 .............. 1992
Figure 30-32. Slave Mode SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................ 1993
Figure 30-33. I
2
C Timing ....................................................................................................... 1994
Figure 30-34. MOSC Crystal Characteristics for Ethernet ........................................................ 1995
Figure 30-35. Single-Ended MOSC Characteristics for Ethernet .............................................. 1996
Figure 30-36. Reset Timing ................................................................................................... 1996
Figure 30-37. 100 Base-TX Transmit Timing ........................................................................... 1997
Figure 30-38. 10Base-TX Normal Link Pulse Timing ............................................................... 1997
Figure 30-39. Auto-Negotiation Fast Link Pulse Timing ........................................................... 1998
Figure 30-40. 100Base-TX Signal Detect Timing ..................................................................... 1998
Figure 30-41. ULPI Interface Timing Diagram ......................................................................... 2000
Figure A-1. Key to Part Numbers ........................................................................................ 2009
Figure A-2. TM4C129ENCPDT 128-Pin TQFP Package Diagram ......................................... 2011
17June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller