Datasheet

DescriptionResetTypeNameBit/Field
Quick Command
DescriptionValue
Bus transaction is not a quick command.0
The bus transaction is a quick command. To execute a quick
command, the START, STOP and RUN bits also need to be set.
After the quick command is issued, the master generates a
STOP.
1
0WOQCMD5
High-Speed Enable
DescriptionValue
The master operates in Standard, Fast mode, or Fast mode
plus as selected by using a value in the I2CMTPR register that
results in an SCL frequency of 100 kbps for Standard mode,
400 kbps for Fast mode, or 1 Mpbs for Fast mode plus.
0
The master operates in High-Speed mode with transmission
speeds up to 3.33 Mbps.
1
0WOHS4
Data Acknowledge Enable
DescriptionValue
The received data byte is not acknowledged automatically by
the master.
0
The received data byte is acknowledged automatically by the
master. See field decoding in Table 21-5 on page 1432.
1
0WOACK3
Generate STOP
DescriptionValue
The controller does not generate the STOP condition.0
The controller generates the STOP condition. See field decoding
in Table 21-5 on page 1432.
1
0WOSTOP2
Generate START
DescriptionValue
The controller does not generate the START condition.0
The controller generates the START or repeated START
condition. See field decoding in Table 21-5 on page 1432.
1
0WOSTART1
June 18, 20141430
Texas Instruments-Production Data
Inter-Integrated Circuit (I
2
C) Interface