Datasheet

23.4.3 Interface Configuration ............................................................................................... 1587
23.5 Initialization and Configuration .................................................................................... 1588
23.5.1 Ethernet PHY Initialization .......................................................................................... 1589
23.6 Register Map ............................................................................................................ 1591
23.7 Ethernet MAC Register Descriptions ........................................................................... 1594
23.8 Ethernet PHY Register Descriptions ........................................................................... 1713
24 Universal Serial Bus (USB) Controller ............................................................. 1768
24.1 Block Diagram ........................................................................................................... 1769
24.2 Signal Description ..................................................................................................... 1769
24.3 Register Map ............................................................................................................ 1770
25 Analog Comparators .......................................................................................... 1777
25.1 Block Diagram ........................................................................................................... 1778
25.2 Signal Description ..................................................................................................... 1778
25.3 Functional Description ............................................................................................... 1779
25.3.1 Internal Reference Programming ................................................................................ 1780
25.4 Initialization and Configuration .................................................................................... 1782
25.5 Register Map ............................................................................................................ 1783
25.6 Register Descriptions ................................................................................................. 1783
26 Pulse Width Modulator (PWM) .......................................................................... 1793
26.1 Block Diagram ........................................................................................................... 1794
26.2 Signal Description ..................................................................................................... 1796
26.3 Functional Description ............................................................................................... 1796
26.3.1 Clock Configuration ................................................................................................... 1796
26.3.2 PWM Timer ............................................................................................................... 1796
26.3.3 PWM Comparators .................................................................................................... 1797
26.3.4 PWM Signal Generator .............................................................................................. 1798
26.3.5 Dead-Band Generator ............................................................................................... 1799
26.3.6 Interrupt/ADC-Trigger Selector ................................................................................... 1799
26.3.7 Synchronization Methods .......................................................................................... 1800
26.3.8 Fault Conditions ........................................................................................................ 1801
26.3.9 Output Control Block .................................................................................................. 1802
26.4 Initialization and Configuration .................................................................................... 1802
26.5 Register Map ............................................................................................................ 1803
26.6 Register Descriptions ................................................................................................. 1806
27 Quadrature Encoder Interface (QEI) ................................................................. 1872
27.1 Block Diagram ........................................................................................................... 1872
27.2 Signal Description ..................................................................................................... 1874
27.3 Functional Description ............................................................................................... 1874
27.4 Initialization and Configuration .................................................................................... 1877
27.5 Register Map ............................................................................................................ 1877
27.6 Register Descriptions ................................................................................................. 1878
28 Pin Diagram ........................................................................................................ 1895
29 Signal Tables ...................................................................................................... 1896
29.1 Signals by Pin Number .............................................................................................. 1897
29.2 Signals by Signal Name ............................................................................................. 1909
29.3 Signals by Function, Except for GPIO ......................................................................... 1921
29.4 GPIO Pins and Alternate Functions ............................................................................ 1932
11June 18, 2014
Texas Instruments-Production Data
Tiva
™
TM4C129ENCPDT Microcontroller