Datasheet

16.3.1 GPTM Reset Conditions
After reset has been applied to the GPTM module, the module is in an inactive state, and all control
registers are cleared and in their default states. Counters Timer A and Timer B are initialized to all
1s, along with their corresponding registers:
■ Load Registers:
– GPTM Timer A Interval Load (GPTMTAILR) register (see page 1128)
– GPTM Timer B Interval Load (GPTMTBILR) register (see page 1129)
■ Shadow Registers:
– GPTM Timer A Value (GPTMTAV) register (see page 1138)
– GPTM Timer B Value (GPTMTBV) register (see page 1139)
The following prescale counters are initialized to all 0s:
■ GPTM Timer A Prescale (GPTMTAPR) register (see page 1132)
■ GPTM Timer B Prescale (GPTMTBPR) register (see page 1133)
■ GPTM Timer A Prescale Snapshot (GPTMTAPS) register (see page 1141)
■ GPTM Timer B Prescale Snapshot (GPTMTBPS) register (see page 1142)
16.3.2 Timer Clock Source
The general purpose timer has the capability of being clocked by either the system clock or an
alternate clock source. By setting the ALTCLK bit in the GPTM Clock Configuration (GPTMCC)
register, offset 0xFC8, software can selects an alternate clock source as programmed in the Alternate
Clock Configuration (ALTCLKCFG) register, offset 0x138 in the System Control Module. The
alternate clock source options available are PIOSC, RTCOSC and LFIOSC. Refer to “System
Control” on page 227 for additional information.
Note: When the ALTCLK bit is set in the GPTMCC register to enable using the alternate clock
source, the synchronization imposes restrictions on the starting count value (down-count),
terminal value (up-count) and the match value. This restriction applies to all modes of
operation. Each event must be spaced by 4 Timer (ALTCLK) clock periods + 2 system clock
periods. If some events do not meet this requirement, then it is possible that the timer block
may need to be reset for correct functionality to be restored.
Example: ALTCLK= T
PIOSC
= 62.5ns (16Mhz Trimmed)
T
hclk
= 1us (1Mhz)
4*62.5ns + 2*1us = 2.25us 2.25us/62.5ns = 36 or 0x23
The minimum values for the periodic or one-shot with a match interrupt enabled are:
GPTMTAMATCHR = 0x23 GPTMTAILR = 0x46
16.3.3 Timer Modes
This section describes the operation of the various timer modes. When using Timer A and Timer B
in concatenated mode, only the Timer A control and status bits must be used; there is no need to
use Timer B control and status bits. The GPTM is placed into individual/split mode by writing a value
1083June 18, 2014
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Tiva
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TM4C129ENCPDT Microcontroller