Datasheet

DescriptionResetTypeNameBit/Field
µDMA Request Enable
This bit controls whether the µDMA interrupts can be
programmed/controlled in the SHA_DMA_IM register.
Note: If the µDMA is used for transferring data, then the IT_EN bit
should be set to 0 and the SHA_IRQENABLE register should
be clear.
DescriptionValue
µDMA interrupts are disabled.0
µDMA interrupts are enabled.1
0RWDMA_EN3
Interrupt Enable
This bit controls whether the software interrupts can be
programmed/controlled in the SHA_IRQENABLE register.
Note: When enabling the interrupts in the SHA_IRQENABLE
register, the application should poll these interrupts and
configure a software interrupt in the µDMA to handle a trigger
event.
DescriptionValue
SHA software Interrupts are disabled.0
SHA software interrupts are enabled.1
0RWIT_EN2
Soft reset
DescriptionValue
No operation0
Start soft reset sequence1
0RWSOFTRESET1
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
1ROreserved0
June 18, 20141070
Texas Instruments-Production Data
SHA/MD5 Accelerator